SLUSAO0H November   2011  – July 2022 BQ24160 , BQ24160A , BQ24161 , BQ24161B , BQ24163 , BQ24168

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Charge Mode Operation
        1. 8.3.1.1 Charge Profile
        2. 8.3.1.2 PWM Controller in Charge Mode
      2. 8.3.2  Battery Charging Process
      3. 8.3.3  Battery Detection
      4. 8.3.4  Dynamic Power Path Management (DPPM)
      5. 8.3.5  Input Source Connected
      6. 8.3.6  Battery Only Connected
      7. 8.3.7  Battery Discharge FET (BGATE)
      8. 8.3.8  DEFAULT Mode
      9. 8.3.9  Safety Timer and Watchdog Timer (BQ24160/BQ24161/BQ24161B/BQ24163 only)
      10. 8.3.10 D+, D– Based Adapter Detection for the USB Input (D+, D–, BQ24160/0A/3)
      11. 8.3.11 USB Input Current Limit Selector Input (PSEL, BQ24161/161B/168 only)
      12. 8.3.12 Hardware Chip Disable Input (CD)
      13. 8.3.13 LDO Output (DRV)
      14. 8.3.14 External NTC Monitoring (TS)
      15. 8.3.15 Thermal Regulation and Protection
      16. 8.3.16 Input Voltage Protection in Charge Mode
        1. 8.3.16.1 Sleep Mode
        2. 8.3.16.2 Input Voltage Based DPM
        3. 8.3.16.3 Bad Source Detection
        4. 8.3.16.4 Input Overvoltage Protection
        5. 8.3.16.5 Reverse Boost (Boost Back) Prevention Circuit
      17. 8.3.17 Charge Status Outputs (STAT, INT)
      18. 8.3.18 Good Battery Monitor
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
      1. 8.5.1 Serial Interface Description
        1. 8.5.1.1 F/S Mode Protocol
    6. 8.6 Register Maps
      1. 8.6.1 Status/Control Register (READ/WRITE)
      2. 8.6.2 Battery/ Supply Status Register (READ/WRITE)
      3. 8.6.3 Control Register (READ/WRITE)
      4. 8.6.4 Control/Battery Voltage Register (READ/WRITE)
      5. 8.6.5 Vender/Part/Revision Register (READ only)
      6. 8.6.6 Battery Termination/Fast Charge Current Register (READ/WRITE)
      7. 8.6.7 VIN-DPM Voltage/ DPPM Status Register
      8. 8.6.8 Safety Timer/ NTC Monitor Register (READ/WRITE)
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Inductor and Capacitor Selection Guidelines
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Requirements for SYS Output
    2. 10.2 Requirements for Charging
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
      1.      Mechanical, Packaging, and Orderable Information

Serial Interface Description

The BQ2416xx uses an I2C-compatible interface to program charge parameters. I2C is a 2-wire serial interface developed by Philips Semiconductor (see I2C-Bus Specification, Version 2.1, January 2000). The bus consists of a data line (SDA) and a clock line (SCL) with pullup structures. When the bus is idle, both SDA and SCL lines are pulled high. All I2C-compatible devices connect to the I2C bus through open drain I/O pins, SDA and SCL. A host device, usually a microcontroller or a digital signal processor, controls the bus. The host is responsible for generating the SCL signal and device addresses. The host also generates specific conditions that indicate the START and STOP of data transfer. A target device receives and/or transmits data on the bus under control of the host device.

The BQ2416xx device works as a target and supports the following data transfer modes, as defined in the I2C Bus Specification: standard mode (100 kbps) and fast mode (400 kbps). The interface adds flexibility to the battery charging solution, enabling most functions to be programmed to new values depending on the instantaneous application requirements. Register contents remain intact as long as battery voltage remains above 2.5 V (typical). The I2C circuitry is powered from VBUS when a supply is connected. If the VBUS supply is not connected, the I2C circuitry is powered from the battery through BAT. The battery voltage must stay above 2.5 V with no input connected in order to maintain proper operation.

The data transfer protocol for standard and fast modes is exactly the same; therefore, they are referred to as the F/S-mode in this document. The BQ2416xx devices only support 7-bit addressing. The device 7-bit address is defined as ‘1101011’ (6Bh).