SLUSEW1C January   2024  – June 2026 TPS4810-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Charge Pump and Gate Driver Output (VS, G1PU, G1PD, G2, BST, SRC)
      2. 7.3.2 Capacitive Load Driving Using FET Gate (G1PU, G1PD) Slew Rate Control
      3. 7.3.3 Short-Circuit Protection
        1. 7.3.3.1 Short-Circuit Protection With Auto-Retry
        2. 7.3.3.2 Short-Circuit Protection With Latch-Off
      4. 7.3.4 Undervoltage Protection (UVLO)
      5. 7.3.5 Reverse Polarity Protection
      6. 7.3.6 Short-Circuit Protection Diagnosis (SCP_TEST)
      7. 7.3.7 TPS48100-Q1 as a Simple Gate Driver
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application: Circuit Breaker in Battery Management System (BMS) using Low Side Current Sense
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Selection of Current Sense Resistor, RSNS
        2. 8.2.2.2 Programming the Short-Circuit Protection Threshold – RISCP Selection
        3. 8.2.2.3 Programming the Short-Circuit Protection Delay – CTMR Selection
        4. 8.2.2.4 Selection of MOSFETs, Q1 and Q2
        5. 8.2.2.5 Selection of Bootstrap Capacitor, CBST
        6. 8.2.2.6 Setting the Undervoltage Lockout
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.2.2.6 Setting the Undervoltage Lockout

Adjust the undervoltage lockout (UVLO) using an external voltage divider network of R1 and R2 connected between VS, EN/UVLO and GND pins of the device. The values required for setting the undervoltage and overvoltage are calculated by solving Equation 14.

Equation 14. V ( U V L O R ) = R 2 ( R 1 + R 2 ) × V I N U V L O

For minimizing the input current drawn from the power supply, TI recommends to use higher values of resistance for R1 and R2. However, leakage currents due to external active components connected to the resistor string can add error to these calculations. So, select the resistor string current, I(R12) as 20 times greater than the leakage current of UVLO pin.

From the device electrical specifications, V(UVLOR) = 1.24V. From the design requirements, VINUVLO is 6.5V. To solve the equation, first select the value of R1 = 470kΩ and use Equation 14 to solve for R2 = 24.9kΩ. Select the closest standard 1% resistor values: R1 = 470kΩ, and R2 = 24.9kΩ.