SLUSEW1C January   2024  – June 2026 TPS4810-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Charge Pump and Gate Driver Output (VS, G1PU, G1PD, G2, BST, SRC)
      2. 7.3.2 Capacitive Load Driving Using FET Gate (G1PU, G1PD) Slew Rate Control
      3. 7.3.3 Short-Circuit Protection
        1. 7.3.3.1 Short-Circuit Protection With Auto-Retry
        2. 7.3.3.2 Short-Circuit Protection With Latch-Off
      4. 7.3.4 Undervoltage Protection (UVLO)
      5. 7.3.5 Reverse Polarity Protection
      6. 7.3.6 Short-Circuit Protection Diagnosis (SCP_TEST)
      7. 7.3.7 TPS48100-Q1 as a Simple Gate Driver
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application: Circuit Breaker in Battery Management System (BMS) using Low Side Current Sense
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Selection of Current Sense Resistor, RSNS
        2. 8.2.2.2 Programming the Short-Circuit Protection Threshold – RISCP Selection
        3. 8.2.2.3 Programming the Short-Circuit Protection Delay – CTMR Selection
        4. 8.2.2.4 Selection of MOSFETs, Q1 and Q2
        5. 8.2.2.5 Selection of Bootstrap Capacitor, CBST
        6. 8.2.2.6 Setting the Undervoltage Lockout
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.6 Switching Characteristics

TJ = –40°C to +150°C. V(VS) = 48V, V(BST – SRC) = 11V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tG1PU(INP_H) INP1 Turn ON propagation Delay INP1 ↑ to G1PU  ↑,  CL = 47nF 0.19 1.62 µs
tG2(INP2_H) INP2 Turn ON propagation Delay INP2 ↑ to G2  ↑,  CL = 47nF 2.7 4.5 7.2 µs
tG1PD(INP_L) INP1Turn OFF propagation Delay INP1 ↓ to G1PD  ↓, CL = 47nF 0.29 0.91 µs
tG2(INP2_L) INP2 Turn OFF propagation Delay INP2 ↓ to G2  ↓, CL = 47nF 2.7 4.4 7.3 µs
tPD(EN_OFF) EN Turn OFF Propogation Delay EN ↓ to G1PD  ↓, CL = 47nF 2.2 4.6 6.5 µs
tPD(UVLO_OFF) UVLO Turn OFF Propogation Delay UVLO ↓ to G1PD  ↓ and FLT ↓, CL = 47nF 2.8 4.2 6.5 µs
tSC Hard Short-circuit protection propagation delay V(CS+–CS–)↑ V(SCP) to G1PD ↓, CL = 47nF, C(TMR) = Open 4.3 µs
tSC_PUS Short-circuit protection propagation delay during power up with output short circuit CTMR = Open 10.7 µs
FISCP ISCP Pulse current frequency 1.18 kHz