SLUSFL9 April   2025 TPS1212-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Charge Pump and Gate Driver Output (VS, GATE, BST, SRC)
      2. 8.3.2 Capacitive Load Driving
        1. 8.3.2.1 Using Low Power Bypass FET (G drive) for Load Capacitor Charging
        2. 8.3.2.2 Using Main FET (GATE Drive) Gate Slew Rate Control
      3. 8.3.3 Overcurrent and Short-Circuit Protection
        1. 8.3.3.1 I2t based Overcurrent Protection
          1. 8.3.3.1.1 I2t based Overcurrent Protection with Auto-Retry
          2. 8.3.3.1.2 I2t based Overcurrent Protection with Latch-Off
        2. 8.3.3.2 Short-Circuit Protection
      4. 8.3.4 Analog Bi-directional Current Monitor Output (IMON)
      5. 8.3.5 NTC based Temperature Sensing (TMP) and Analog Monitor Output (ITMPO)
      6. 8.3.6 Fault Indication and Diagnosis (FLT)
      7. 8.3.7 Reverse Polarity Protection
      8. 8.3.8 Undervoltage Protection (UVLO)
    4. 8.4 Device Functional Modes
      1. 8.4.1 State Diagram
      2. 8.4.2 State Transition Timing Diagram
      3. 8.4.3 Power Down
      4. 8.4.4 Shutdown Mode
      5. 8.4.5 Low Power Mode (LPM)
      6. 8.4.6 Active Mode (AM)
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application 1: Driving Power at all times (PAAT) Loads With Automatic Load Wakeup
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application 2: Driving Power at all times (PAAT) Loads With Automatic Load Wakeup and Output Bulk Capacitor Charging
      1. 9.3.1 Design Requirements
      2. 9.3.2 External Component Selection
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.1 Overview

TPS1212-Q1 is a family of low IQ smart high side drivers with protection and diagnostics. The TPS1212-Q1 has wide operating voltage range of 3.5V to 73V, 74V absmax the device is suitable for 12V, 24V, and 48V automotive system designs.

TPS1212-Q1 has two integrated gate drives with 0.5A peak source/ 2A sink gate driver to drive FETs in main path and 100μA src/0.39A sink capacity for the low power path. The strong gate drive (GATE) enables power switching using parallel FETs in high current system designs where INP pin can be used as the GATE control input.

In the low power mode with LPM = Low, the low power path FET (G drive) is kept ON and the main FETs (GATE drive) are turned OFF. The device consumes low IQ of 20μA (typ) in this mode. Auto load wakeup threshold and output bulk capacitor charging current can be programmed using RBYPASS resistor placed across DRN and CS2– pins in low power path. IQ reduces to 1μA (typical) with EN/UVLO pulled low. The device features WAKE output pin to indicate the mode of operation (Active/Low power mode).

The device has accurate current sensing (±2% at 30mV VSNS) output (IMON) enabling systems for energy management. The device has integrated accurate and adjustable I2t based overcurrent and short circuit protection by using an external RSNS resistor. Auto-retry and latch-off fault behavior can be configured.

TPS1212-Q1 indicate fault on open drain FLT output during overcurrent, short circuit, charge pump under voltage and external FET overtemperature conditions.

TPS1212-Q1 has integrated reverse polarity protection down to –65V and do not need any external components to protect the ICs during an input reverse polarity fault.

The device features NTC based temperature sensing (TMP) and monitor output (ITMPO) output to sense overtemperature of external FETs enabling robust thermal system designs.

The TPS1212x-Q1 is available in a 23-pin QFN package.