SLUU818A April   2012  – February 2022 TPS51219

 

  1.   Trademarks
  2. 1Description
    1. 1.1 Typical Applications
    2. 1.2 Features
  3. 2Electrical Performance Specifications
  4. 3Schematic
  5. 4Test Setup
    1. 4.1 Test Equipment
    2. 4.2 Recommended Test Setup
  6. 5Test Procedure
    1. 5.1 Line/Load Regulation and Efficiency Measurement Procedure
    2. 5.2 List of Test Points
    3. 5.3 Equipment Shutdown
  7. 6Performance Data and Typical Characteristic Curves
    1. 6.1 Efficiency
    2. 6.2 Load Regulation
    3. 6.3 Line Regulation
    4. 6.4 Load Transient
    5. 6.5 Output Ripple
    6. 6.6 Switch Node Voltage
    7. 6.7 Turn-On/Turn-Off Waveform
    8. 6.8 Output 0.5-V Prebias Turnon Waveform
  8. 7EVM Assembly Drawing and PCB Layout
  9. 8Bill of Materials
  10. 9Revision History

7 EVM Assembly Drawing and PCB Layout

The following figures (Figure 7-2 through Figure 7-6) show the design of the TPS51219EVM-630 printed-circuit board (PCB). The EVM has been designed using four-layer, 2-oz copper circuit board.

GUID-AF090EB6-D4C6-4D44-811F-5C9C8B069210-low.pngFigure 7-1 TPS51219EVM-630 Top Layer Assembly Drawing (Top View)
GUID-043C624E-12E1-4E16-B354-38524689D0C8-low.pngFigure 7-2 TPS51219EVM-630 Bottom Layer Assembly Drawing (Bottom View)
GUID-B867FC39-D707-489C-B0DF-1AA866BEAC8F-low.pngFigure 7-3 TPS51219EVM-630 Top Copper Layer (Top View)
GUID-4210CACD-5C1A-4313-9C4F-2042C0BE458F-low.pngFigure 7-4 TPS51219EVM-630 Internal Layer 1 (Top View)
GUID-EAB4FD65-EAE2-4DD7-A0C6-4F7C135CC15F-low.pngFigure 7-5 TPS51219EVM-630 Internal Layer 2 (Top View)
GUID-2AB2ED17-3CD0-4A12-ADBA-D75C236CD581-low.pngFigure 7-6 TPS51219EVM-630 Bottom Copper Layer (Top View)