SLUUBG8C November   2018  – October 2021

 

  1.   Trademarks
  2. 1 Introduction
  3. 2 Description
  4. 3 Features
    1. 3.1 I/O Description
    2. 3.2 Jumpers (Shunt) Setting
  5. 4 Electrical Specifications
  6. 5 Test Summary
    1. 5.1 Definitions
    2. 5.2 Equipment
      1. 5.2.1 Power Supplies
      2. 5.2.2 Function Generators
    3. 5.3 Equipment Setup
      1. 5.3.1 DC Power Supply Settings
      2. 5.3.2 Digital Multi-Meter Settings
      3. 5.3.3 Two-Channel Function Generator Settings
      4. 5.3.4 Oscilloscope Setting
      5. 5.3.5 Jumper (Shunt) Settings
      6. 5.3.6 Bench Setup Diagram
  7. 6 Power-Up and Power-Down Procedure
    1. 6.1 Power Up
    2. 6.2 Power Down
  8. 7 Test Waveforms (CL=0pF) With Different DT Configurations
    1. 7.1 DT Connected to VCCI (J-DT Option B in Table 1-1 )
    2. 7.2 DT Pin Floating or Left Open (J-DT Option A in Table 1-1 )
    3. 7.3 DT Pin Connected to RDT (J-DT Option C in Table 1-1 )
  9. 8 Schematic
  10. 9 Layout Diagrams
  11. 10List of Materials
  12. 11Revision History

3.2 Jumpers (Shunt) Setting

Table 3-2 Jumpers Setting
JACKJumper Setting OptionsFACTORY SETTING
J-INAOption A:Jumper not installed, INA/PWM signal provided by external signal and this pin is default low if left openOption A
Option B:Jumper on J1-INA and J1-GND set INA low
Option C:Jumper on J1-INA and J1-VCCI set INA high
J-INBOption A:Jumper not installed, INB signal provided by external signal and this pin is default low if left openOption A for UCC21520EVM-286, UCC21521CEM-286 and UCC21530EVM-286; Option D for UCC20520EVM-286
Option B:Jumper on J2-INB and J2-GND set INB low
Option C:Jumper on J2-INB and J2-VCCI set INB high
Option D:Header J2-INB is not installed, and no connection on the device under test
J-DIS or J-DIS/ENOption A:Jumper not installed, the devices under test are enabled when left open on enable/disable pinOption C for UCC21520EVM-286 and UCC20520EVM-286; Option B for UCC21521CEVM-286 and UCC21530EVM-286
Option B:Jumper on J3-EN/DIS and J3-GND
Option C:Jumper on J3-EN/DIS and J3-VCCI
J-DTOption A:Jumper not installed, interlock with 8-ns dead timeOption B
Option B:Jumper on J4-DT and J4-VCCI allows driver output overlap or driver output follows PWM input for UCC21520EVM and UCC21521CEVM. The dead time will be around 0 ns in this option for UCC20520EVM
Option C:Jumper on J4-DT and J4-R2 set the dead time by DT (in ns) = RDT (in kΩ) × 10. For better noise immunity and dead-time matching, TI recommends to parallel a 2.2-nF or above bypassing capacitor from DT pin to GND.