SLUUC37C july   2019  – august 2023 BQ75614-Q1 , BQ79616 , BQ79616-Q1 , BQ79656-Q1

 

  1.   1
  2.   BQ79616-Q1 and BQ75614-Q1 Evaluation Modules
  3.   Trademarks
  4.   General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  5. 1 General Description
    1. 1.1 Key Features
    2. 1.2 Key Electrical Parameters
  6. 2 Theory of Operation - Stackable BQ79616EVM
    1. 2.1 Single Board
    2. 2.2 Stacked Systems
    3. 2.3 Configuring the BQ79616-Q1 EVM to be used for Lower Cell Count Applications
  7. 3 Theory of Operation - Standalone BQ75614EVM
  8. 4 Connectors
    1. 4.1 Primary Input and Output Connectors
      1. 4.1.1 Jumper Placements
      2. 4.1.2 Battery Connector
      3. 4.1.3 Host Interface
      4. 4.1.4 GPIO or Thermistor Inputs
      5. 4.1.5 High-Side and Low-Side Communications
  9. 5 Quick Start Guide
    1. 5.1 Required Devices for using the Example Code
    2. 5.2 Power Connections
      1. 5.2.1 On-Board Resistor Ladder - Power Supply
      2. 5.2.2 Using Actual Battery Cells
    3. 5.3 Connecting the EVM to TMS570 LaunchPad
    4. 5.4 Stacking BQ79616EVMs
    5. 5.5 Software
    6. 5.6 GUI
      1. 5.6.1 GUI UART Connection
  10. 6 Physical Dimensions
    1. 6.1 Board Dimensions
    2. 6.2 Board Mounting
  11. 7 BQ79616EVM Schematic, Assembly, Layout, and BOM
    1. 7.1 Schematic
    2. 7.2 Assembly
    3. 7.3 Layout
    4. 7.4 BQ79616EVM-021 Bill of Materials (BOM)
  12. 8 BQ75614EVM Schematic, Assembly, Layout, and BOM
    1. 8.1 Schematic
    2. 8.2 Assembly
    3. 8.3 Layout
    4. 8.4 BQ75614EVM Bill of Materials (BOM)
  13. 9 BQ79656EVM Schematic, Assembly, Layout, and BOM
    1. 9.1 Schematic
    2. 9.2 Assembly
    3. 9.3 Layout
    4. 9.4 BQ79656EVM Bill of Materials (BOM)
  14. 10Revision History

5.2 Power Connections

If powering the EVM using the included resistor ladder as cells, simply ensure that the power supply positive terminal is connected to the "VSTACK" or "PWR" testpoints provided on the board, and the power supply negative terminal is connected to the "GND" or "Cell0" testpoints provided on the board, or any "GND" standoff provided.

If not using the resistor ladder, the power supply positive terminal must be connected to the "PWR" testpoint, and the power supply negative terminal must be connected to the "Cell0" testpoint.

Also ensure that headers J16 and J14 are both jumpered, to allow for power and ground to be supplied from the "battery stack" (resistor ladder).