SLUUCR8A January   2023  – December 2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Warning and Caution
  5. 2Introduction
    1. 2.1 Performance Specification
    2. 2.2 Dual Package Layout
    3. 2.3 Modifications
      1. 2.3.1 Input and Output Capacitors
      2. 2.3.2 Loop Response Measurement
  6. 3Setup
    1. 3.1 Connector Descriptions
    2. 3.2 Hardware Setup
  7. 4TPS62830xDRLEVM Test Results
  8. 5Board Layout
  9. 6Schematic and Bill of Materials
    1. 6.1 Schematic
    2. 6.2 Bill of Materials
  10. 7Revision History

3.1 Connector Descriptions

J1, Pin 1 and 2 – VIN Positive input voltage connection from the input supply for the EVM.
J1, Pin 3 and 4 – S+/S– Input voltage sense connections, measure the input voltage at this point.
J1, Pin 5 and 6 – GND Input return connection from the input supply for the EVM.
J2, Pin 1 and 2 – VOUT Positive output voltage connection.
J2, Pin 3 and 4 – S+/S– Output voltage sense connections, measure the output voltage at this point.
J2, Pin 5 and 6 – GND Output return connection.
J3 – PG/GND The PG output appears on pin 1 of this header with a convenient ground on pin 2.
JP1 – EN EN pin jumper. Place the supplied jumper across ON and EN to turn on the IC. Place the jumper across OFF and EN to turn off the IC.
JP2 – MODE

MODE pin jumper. Place the supplied jumper across VIN and MODE to force the device in fixed frequency PWM operation at all load currents. Place the jumper across MODE and GND to enable power save mode.