SLVAF11 June   2021 TPS51397A , TPS566231 , TPS566235 , TPS566238 , TPS568230

 

  1.   Trademarks
  2. 1Introduction
  3. 2Open Loop Frequency Response of D-CAP2 and D-CAP3 Converter
  4. 3Method to Choose LC Value for Loop Stability
    1. 3.1 Limits of Output Capacitance
    2. 3.2 Phase Margin Estimation Method
  5. 4Example of LC Design Method for D-CAP3 Converter
  6. 5Simulation and Experimental Verification
  7. 6Summary
  8. 7References
  9. 8Appendix A

6 Summary

An application design method is proposed in this application report for D-CAP2/D-CAP3 converters based on loop stability analysis. The method is based on two principles to achieve enough phase margin: First, ensure -20dB/decade slope at crossover frequency. Second, limit bandwidth below 1/3*fsw. Combined with the loop characteristics of D-CAP2/D-CAP3 converter, the limits for output capacitance are derived. For evaluation of the chosen components value, a phase margin estimation method is further proposed. Finally, a detailed flow chart is given to help designing application of D-CAP2/D-CAP3 converter. The proposed methods are verified by both simulation and experiment.

Note: The internal ramp inside some D-CAP converters for jitter performance improvement will decrease phase margin a little. For those types of converters, please leave more margin from limits when choosing output capacitor. Meanwhile, the calculated phase margin needs to subtract about 5-10 degree for the stability evaluation.