SLVAFP8 December   2023 AM625SIP , TPS65219

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 TPS65219 Overview
    1. 2.1 TPS65219 Functional Block Diagram
  6. 3 TPS65219 Variants
    1. 3.1 TPS65219 NVMs to Power AM625SIP
  7. 4 TPS6521905 User-Programmable NVM
  8. 5 AM62x Core Voltage Selection
  9. 6 VSYS Voltage Ramp
  10. 7 Power Block Diagrams
    1. 7.1 TPS6521902 Powering AM62x
    2. 7.2 TPS6521908 Powering AM62x
  11. 8 TPS65219 VS Discrete
  12. 9 Summary
  13. 10References

3.1 TPS65219 NVMs to Power AM625SIP

Table 3-1 TPS65219 NVMs for AM62x Industrial Applications
TPS6521902 TPS6521908
Use Case Vsys 3.3 V 3.3 V
VDD_CORE 0.75 V 0.85 V
Integrated Memory LPDDR4 LPDDR4
Technical Reference Manual (TRM) SLVUCL0 SLVUCM0
BUCK1 Vout 0.75 V 0.85 V
Bandwidth High bandwidth High bandwidth
BUCK2 Vout 1.8 V 1.8 V
Bandwidth High bandwidth High bandwidth
BUCK3 Vout 1.1 V 1.1 V
Bandwidth High bandwidth High bandwidth
LDO1 Vout 3.3 V/1.8 V (Bypass) 3.3 V/1.8 V (Bypass)
LDO2 Vout 0.85 V 1.2 V (Disabled)
LDO3 Vout 1.8 V 1.8 V
LDO4 Vout 2.5 V 2.5 V
GPIOs GPO1 Disabled Disabled
GPO2 Enabled Enabled
GPIO Disabled Disabled
MODE/RESET Config Warm Reset Warm Reset
Polarity High= Normal operation

Low=Warm Reset

 High= Normal operation

Low=Warm Reset
MODE/SBY Config Mode and Standby Mode and Standby
Polarity High=Active State & Forced-PWM

Low=Stby State & Auto-PFM

 High=Active State & Forced-PWM

Low=Stby State & Auto-PFM
VSEL_SD/DDR Config SD SD
Rail LDO1 LDO1
Polarity High = LDO1_VSET

Low = 1.8 V

 High = LDO1_VSET

Low = 1.8 V
EN/PB/VSENSE pin config Push-button Enable
First Supply detection [1] Enabled Enabled
  1. First Supply detection allows power-up as soon as supply voltage is applied, even if EN/PB/VSENSE pin is at OFF_REQ status. FSD can be used in combination with any ON-request configuration, EN, PB or VSENSE. At first power-up the EN/PB/VSENSE pin is treated as if it had a valid ON request.
Note: See Section 5 for a comparison of the two VDD_CORE operating points.