SLVS350L October   2002  – January 2026 TPS795

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Shutdown
      2. 6.3.2 Start-Up
      3. 6.3.3 Undervoltage Lockout (UVLO)
      4. 6.3.4 Regulator Protection
      5. 6.3.5 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Load Transient Response
        3. 7.2.2.3 Output Noise
        4. 7.2.2.4 Dropout Voltage
        5. 7.2.2.5 Programming the TPS79501 Adjustable LDO Regulator
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Board Layout Recommendation to Improve PSRR and Noise Performance
        2. 7.5.1.2 Regulator Mounting
        3. 7.5.1.3 Thermal Considerations
        4. 7.5.1.4 Estimating Junction Temperature
      2. 7.5.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Modules
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.6 Typical Characteristics

at VEN = VIN, VIN = VOUT(nom) + 1V, IOUT = 1mA, COUT = 10 µF, CNR = 0.01 µF, CIN = 2.2 µF, and TJ = 25°C (unless otherwise noted)

TPS795 TPS795 Output Voltage vs Output Current
Legacy chip
Figure 5-1 TPS795 Output Voltage vs Output Current
TPS795 TPS795 Output Voltage vs Junction Temperature
Legacy chip
Figure 5-3 TPS795 Output Voltage vs Junction Temperature
TPS795 TPS795 Ground Current vs Junction Temperature
Legacy chip
Figure 5-5 TPS795 Ground Current vs Junction Temperature
TPS795 TPS795 Output Spectral Noise Density vs Frequency
VOUT = 3.0V (legacy chip)
Figure 5-7 TPS795 Output Spectral Noise Density vs Frequency
TPS795 TPS79530 Output Spectral Noise Density vs Frequency
Legacy chip
Figure 5-9 TPS79530 Output Spectral Noise Density vs Frequency
TPS795 TPS795 Root Mean Squared Output Noise vs CNR
VOUT = 3.0V (legacy chip)
Figure 5-11 TPS795 Root Mean Squared Output Noise vs CNR
TPS795 TPS795 Dropout Voltage vs Junction Temperature
New chip
Figure 5-13 TPS795 Dropout Voltage vs Junction Temperature
TPS795 TPS795 Ripple Rejection vs Frequency
Legacy chip
Figure 5-15 TPS795 Ripple Rejection vs Frequency
TPS795 TPS795 Ripple Rejection vs Frequency
Legacy chip
Figure 5-17 TPS795 Ripple Rejection vs Frequency
TPS795 TPS795 Ripple Rejection vs Frequency
COUT = 2.2μF, VOUT = 3.3V (new chip)
Figure 5-19 TPS795 Ripple Rejection vs Frequency
TPS795 TPS795 Start-Up Time
New chip
Figure 5-21 TPS795 Start-Up Time
TPS795 TPS795 Line Transient Response
VOUT = 3.0V (legacy chip)
Figure 5-23 TPS795 Line Transient Response
TPS795 TPS795 Load Transient Response
VOUT = 3.0V (legacy chip)
Figure 5-25 TPS795 Load Transient Response
TPS795 TPS795 Power Up and Power Down
Legacy chip
Figure 5-27 TPS795 Power Up and Power Down
TPS795 TPS795 Dropout Voltage vs Output Current
Legacy chip
Figure 5-29 TPS795 Dropout Voltage vs Output Current
TPS795 TPS795 Dropout Voltage vs Input Voltage
Legacy chip
Figure 5-31 TPS795 Dropout Voltage vs Input Voltage
TPS795 TPS795 Typical Regions of Stability Equivalent Series Resistance (ESR) vs Output Current
VOUT = 3.0V (legacy chip)
Figure 5-33 TPS795 Typical Regions of Stability Equivalent Series Resistance (ESR) vs Output Current
TPS795 TPS795 Typical Regions of Stability Equivalent Series Resistance (ESR) vs Output Current
VOUT = 3.0V (legacy chip)
Figure 5-35 TPS795 Typical Regions of Stability Equivalent Series Resistance (ESR) vs Output Current
TPS795 TPS795 Output Voltage vs Output Current
New chip
Figure 5-2 TPS795 Output Voltage vs Output Current
TPS795 TPS795 Output Voltage vs Junction Temperature
New chip
Figure 5-4 TPS795 Output Voltage vs Junction Temperature
TPS795 TPS795 Ground Current vs Junction Temperature
New chip
Figure 5-6 TPS795 Ground Current vs Junction Temperature
TPS795 TPS795 Output Spectral Noise Density vs Frequency
New Chip
Figure 5-8 TPS795 Output Spectral Noise Density vs Frequency
TPS795 TPS795 Output Spectral Noise Density vs Frequency
VOUT = 3.0V (legacy chip)
Figure 5-10 TPS795 Output Spectral Noise Density vs Frequency
TPS795 TPS795 Dropout Voltage vs Junction Temperature
Legacy chip
Figure 5-12 TPS795 Dropout Voltage vs Junction Temperature
TPS795 TPS795 Ripple Rejection vs Frequency
Legacy chip
Figure 5-14 TPS795 Ripple Rejection vs Frequency
TPS795 TPS795 Ripple Rejection vs Frequency
VOUT = 3.3V (new chip)
Figure 5-16 TPS795 Ripple Rejection vs Frequency
TPS795 TPS795 Ripple Rejection vs Frequency
Legacy chip
Figure 5-18 TPS795 Ripple Rejection vs Frequency
TPS795 TPS795 Start-Up Time
Legacy chip
Figure 5-20 TPS795 Start-Up Time
TPS795 TPS795 Line Transient Response
VOUT = 1.8V (legacy chip)
Figure 5-22 TPS795 Line Transient Response
TPS795 TPS795 Line Transient Response
VOUT = 3.3V, IOUT = 500mA, dV/dt = 1V/μs (new chip)
Figure 5-24 TPS795 Line Transient Response
TPS795 TPS795 Load Transient Response
VOUT = 3.3V (new chip)
Figure 5-26 TPS795 Load Transient Response
TPS795 TPS795 Power-Up and Power-Down
IOUT = 500mA (new chip)
Figure 5-28 TPS795 Power-Up and Power-Down
TPS795 TPS795 Dropout Voltage vs Output Current
New chip
Figure 5-30 TPS795 Dropout Voltage vs Output Current
TPS795 TPS795 Dropout Voltage vs Input Voltage
IOUT = 500mA (new chip)
Figure 5-32 TPS795 Dropout Voltage vs Input Voltage
TPS795 TPS795 Typical Regions of Stability Equivalent Series Resistance (ESR) vs Output Current
VOUT = 3.0V (legacy chip)
Figure 5-34 TPS795 Typical Regions of Stability Equivalent Series Resistance (ESR) vs Output Current