SLVS350L October   2002  – January 2026 TPS795

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Shutdown
      2. 6.3.2 Start-Up
      3. 6.3.3 Undervoltage Lockout (UVLO)
      4. 6.3.4 Regulator Protection
      5. 6.3.5 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Load Transient Response
        3. 7.2.2.3 Output Noise
        4. 7.2.2.4 Dropout Voltage
        5. 7.2.2.5 Programming the TPS79501 Adjustable LDO Regulator
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Board Layout Recommendation to Improve PSRR and Noise Performance
        2. 7.5.1.2 Regulator Mounting
        3. 7.5.1.3 Thermal Considerations
        4. 7.5.1.4 Estimating Junction Temperature
      2. 7.5.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Modules
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.5.1.3 Thermal Considerations

Knowing the device power dissipation and proper sizing of the thermal plane that is connected to the tab or pad is critical to avoiding thermal shutdown and providing reliable operation.

Power dissipation of the device depends on input voltage and load conditions and can be calculated using Equation 5:

Equation 5. TPS795

Power dissipation can be minimized and greater efficiency can be achieved by using the lowest possible input voltage necessary to achieve the required output voltage regulation.

On the VSON (DRB) package, the primary conduction path for heat is through the exposed pad to the printed-circuit-board (PCB). The pad can be connected to ground or be left floating; however, attach the pad to an appropriate amount of copper PCB area to make sure the device does not overheat. On the SOT-223 (DCQ) package, the primary conduction path for heat is through the tab to the PCB. Connect the tab to ground. The maximum junction-to-ambient thermal resistance depends on the maximum ambient temperature, maximum device junction temperature, and power dissipation of the device and can be calculated using Equation 6:

Equation 6. TPS795

Knowing the maximum RθJA, the minimum amount of PCB copper area needed for appropriate heatsinking can be estimated using Figure 7-6.

TPS795 ΘJA vs Board Size
θJA value at board size of 9 in.2 (that is, 3 in. × 3 in.) is a JEDEC standard.
Figure 7-6 ΘJA vs Board Size

Figure 7-6 shows the variation of θJA as a function of ground plane copper area in the board. This figure is intended only as a guideline to demonstrate the effect of heat spreading in the ground plane and is not intended to estimate the thermal performance in real application environments.

Note:

When the device is mounted on an application PCB, use ΨJT and ΨJB, as explained in Section 7.5.1.4.