SLVSB67D November   2011  – January 2025 TLV70012-Q1 , TLV70018-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Internal Current Limit
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Undervoltage Lockout (UVLO)
      4. 6.3.4 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown
      2. 6.4.2 Operation with VIN Less than 2V
      3. 6.4.3 Operation with VIN Greater than 2V
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Transient Response
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Thermal Considerations
        2. 7.4.1.2 Power Dissipation
          1. 7.4.1.2.1 Thermal Calculations
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
      2. 8.1.2 Package Mounting
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

3 Description

The TLV70018-Q1 and TLV70012-Q1 low-dropout (LDO) linear regulators are low quiescent current devices with excellent line and load transient performance. A precision band-gap and error amplifier provides overall 2% accuracy. Low output noise, high power-supply rejection ratio (PSRR), and low-dropout voltage make this series of devices ideal for powering power-sensitive loads. All device versions have thermal shutdown and current limit for detecting fault conditions.

Furthermore, these devices are stable with an effective output capacitance of only 0.1μF. This feature enables the use of cost-effective capacitors that have higher bias voltages and temperature derating. The devices regulate to specified accuracy with no output load.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
TLV70018-Q1 DDC (SOT, 5) 2.9mm × 2.8mm
TLV70012-Q1
(1) For more information, see the Mechanical, Packaging, and Orderable Information.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.

 

 

 

TLV70018-Q1 TLV70012-Q1 Typical Application Typical Application