SLVSBA4F June   2012  – April 2021 DRV8837 , DRV8838

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
    2. 5.1 Dapper Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bridge Control
      2. 7.3.2 Independent Half-Bridge Control
      3. 7.3.3 Sleep Mode
      4. 7.3.4 Power Supplies and Input Pins
      5. 7.3.5 Protection Circuits
        1. 7.3.5.1 VCC Undervoltage Lockout
        2. 7.3.5.2 Overcurrent Protection (OCP)
        3. 7.3.5.3 Thermal Shutdown (TSD)
        4. 7.3.5.4 28
    4. 7.4 Device Functional Modes
  8. 8 Power Supply Recommendations
    1. 8.1 Bulk Capacitance
  9. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
    3. 9.3 Power Dissipation
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Related Links
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Community Resources
    5. 10.5 Trademarks

6.5 Electrical Characteristics

TA = 25°C, over recommended operating conditions unless otherwise noted
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
POWER SUPPLIES (VM, VCC)
VMVM operating voltage011V
IVMVM operating supply currentVM = 5 V; VCC = 3 V;
No PWM		40100μA
VM = 5 V; VCC = 3 V;
50 kHz PWM		0.81.5mA
IVMQVM sleep mode supply currentVM = 5 V; VCC = 3 V;
nSLEEP = 0		3095nA
VCCVCC operating voltage1.87V
IVCCVCC operating supply currentVM = 5 V; VCC = 3 V;
No PWM		300500μA
VM = 5 V; VCC = 3 V;
50 kHz PWM		0.71.5mA
IVCCQVCC sleep mode supply currentVM = 5 V; VCC = 3 V;
nSLEEP = 0		525nA
CONTROL INPUTS (IN1 or PH, IN2 or EN, nSLEEP)
VILInput logic-low voltage falling threshold0.25 × VCC0.38 × VCCV
VIHInput logic-high voltage rising threshold0.46 × VCC0.5 × VCCV
VHYSInput logic hysteresis0.08 × VCCV
IILInput logic low currentVIN = 0 V–55μA
IIHInput logic high currentVIN = 3.3 V50μA
VIN = 3.3 V, DRV8838 nSLEEP pin60μA
RPDPulldown resistance100kΩ
DRV8838 nSLEEP pin55kΩ
MOTOR DRIVER OUTPUTS (OUT1, OUT2)
rDS(on)HS + LS FET on-resistanceVM = 5 V; VCC = 3 V;
IO = 800 mA; TJ = 25°C		280330mΩ
IOFFOff-state leakage currentVOUT = 0 V–200200nA
PROTECTION CIRCUITS
VUVLOVCC undervoltage lockoutVCC falling1.7V
VCC rising1.8
IOCPOvercurrent protection trip level1.93.5A
tDEGOvercurrent deglitch time1μs
tRETRYOvercurrent retry time1ms
TTSDThermal shutdown temperatureDie temperature TJ150160180°C