SLVSGJ9A May   2024  – October 2025 DRV7308

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Absolute Maximum Ratings
  7. 6 ESD Ratings
  8. 7 Recommended Operating Conditions
  9. 8 Thermal Information
  10. 9 Electrical Characteristics
  11. 10Timing Diagrams
  12. 11Typical Characteristics
  13. 12Detailed Description
    1. 12.1 Overview
    2. 12.2 Functional Block Diagram
    3. 12.3 Feature Description
      1. 12.3.1 Output Stage
      2. 12.3.2 Input Control Logic
      3. 12.3.3 ENABLE (EN) Pin Function
      4. 12.3.4 Temperature Sensor Output (VTEMP)
      5. 12.3.5 Brake Function
      6. 12.3.6 Slew Rate Control (SR)
      7. 12.3.7 Dead Time
      8. 12.3.8 Current Limit Functionality (ILIMIT)
      9. 12.3.9 Pin Diagrams
        1. 12.3.9.1 Four-Level Input Pin
        2. 12.3.9.2 Open-Drain Pin
        3. 12.3.9.3 Logic-Level Input Pin (Internal Pulldown)
    4. 12.4 Protections
      1. 12.4.1 GVDD Undervoltage Lockout
      2. 12.4.2 Bootstrap Undervoltage Lockout
      3. 12.4.3 Current Limit Protection
      4. 12.4.4 GaNFET Overcurrent Protection
      5. 12.4.5 Thermal Shutdown (OTS)
  14. 13Application and Implementation
    1. 13.1 Application Information
    2. 13.2 Typical Application
      1. 13.2.1 Application
        1. 13.2.1.1 Application Information
      2. 13.2.2 Application Curves
  15. 14Layout
    1. 14.1 Layout Guidelines
    2. 14.2 Layout Example
  16. 15Revision History
  17. 16Device and Documentation Support
    1. 16.1 Documentation Support
      1. 16.1.1 Related Documentation
    2. 16.2 Receiving Notification of Documentation Updates
    3. 16.3 Support Resources
    4. 16.4 Trademarks
    5. 16.5 Electrostatic Discharge Caution
    6. 16.6 Glossary
  18. 17Mechanical, Packaging, and Orderable Information
    1. 17.1 Tape and Reel Information

13.2.2 Application Curves

DRV7308 Device power up (EN pin low to high) Figure 13-2 Device power up (EN pin low to high)
DRV7308 Device power up (GVDD start up) Figure 13-3 Device power up (GVDD start up)
DRV7308 Motor phase node OUTA switching - falling edge (phase current from motor load to device) Figure 13-4 Motor phase node OUTA switching - falling edge (phase current from motor load to device)
DRV7308 Motor phase node OUTA switching - rising edge (phase current from motor load to device) Figure 13-5 Motor phase node OUTA switching - rising edge (phase current from motor load to device)
DRV7308 Motor phase node OUTA switching - falling edge (phase current from device to motor load) Figure 13-6 Motor phase node OUTA switching - falling edge (phase current from device to motor load)
DRV7308 Motor phase node OUTA switching -rising edge (phase current from device to motor load) Figure 13-7 Motor phase node OUTA switching -rising edge (phase current from device to motor load)
DRV7308 Motor phase node OUTA switching - High-side GaN FET Third Quadrant operation (phase current from motor load to device) Figure 13-8 Motor phase node OUTA switching - High-side GaN FET Third Quadrant operation (phase current from motor load to device)
DRV7308 Motor phase node OUTA switching - Low-side GaN FET Third Quadrant operation (phase current from device to motor load) Figure 13-9 Motor phase node OUTA switching - Low-side GaN FET Third Quadrant operation (phase current from device to motor load)