SLVSGJ9A May   2024  – October 2025 DRV7308

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Absolute Maximum Ratings
  7. 6 ESD Ratings
  8. 7 Recommended Operating Conditions
  9. 8 Thermal Information
  10. 9 Electrical Characteristics
  11. 10Timing Diagrams
  12. 11Typical Characteristics
  13. 12Detailed Description
    1. 12.1 Overview
    2. 12.2 Functional Block Diagram
    3. 12.3 Feature Description
      1. 12.3.1 Output Stage
      2. 12.3.2 Input Control Logic
      3. 12.3.3 ENABLE (EN) Pin Function
      4. 12.3.4 Temperature Sensor Output (VTEMP)
      5. 12.3.5 Brake Function
      6. 12.3.6 Slew Rate Control (SR)
      7. 12.3.7 Dead Time
      8. 12.3.8 Current Limit Functionality (ILIMIT)
      9. 12.3.9 Pin Diagrams
        1. 12.3.9.1 Four-Level Input Pin
        2. 12.3.9.2 Open-Drain Pin
        3. 12.3.9.3 Logic-Level Input Pin (Internal Pulldown)
    4. 12.4 Protections
      1. 12.4.1 GVDD Undervoltage Lockout
      2. 12.4.2 Bootstrap Undervoltage Lockout
      3. 12.4.3 Current Limit Protection
      4. 12.4.4 GaNFET Overcurrent Protection
      5. 12.4.5 Thermal Shutdown (OTS)
  14. 13Application and Implementation
    1. 13.1 Application Information
    2. 13.2 Typical Application
      1. 13.2.1 Application
        1. 13.2.1.1 Application Information
      2. 13.2.2 Application Curves
  15. 14Layout
    1. 14.1 Layout Guidelines
    2. 14.2 Layout Example
  16. 15Revision History
  17. 16Device and Documentation Support
    1. 16.1 Documentation Support
      1. 16.1.1 Related Documentation
    2. 16.2 Receiving Notification of Documentation Updates
    3. 16.3 Support Resources
    4. 16.4 Trademarks
    5. 16.5 Electrostatic Discharge Caution
    6. 16.6 Glossary
  18. 17Mechanical, Packaging, and Orderable Information
    1. 17.1 Tape and Reel Information

13.2.1.1 Application Information

Table 13-1lists the recommended values of the external components for the driver.

Table 13-1 DRV7308 External Components
COMPONENTS PIN1 PIN2 RECOMMENDED
CVM1 VM GND X5R or X7R, 0.1µF, VM-rated capacitor
CVM2 VM GND X5R or X7R, 0.1µF, VM-rated capacitor (optional)
CVM3 VM GND ≥ 10µF, VM-rated capacitor
CGVDD1 GVDD GND X5R or X7R, 0.1µF, GVDD-rated capacitor
CGVDD2 GVDD GND ≥ 10µF, GVDD-rated capacitor
CBOOTA BOOTA OUTA X5R or X7R, 1µF to 220µF, GVDD-rated capacitor
CBOOTB BOOTB OUTB X5R or X7R, 1µF to 220µF, GVDD-rated capacitor
CBOOTC BOOTC OUTC X5R or X7R, 1µF to 220µF, GVDD-rated capacitor
RSR SR GND Reistor to determine slew rate setting
RnFAULT nFAULT 3.3V/ 5.5V / GVDD 5.1kΩ, Pullup resistor
RILM1 ILIMIT 3.3V/ 5.5V / GVDD Based on required ILIMIT threshold
RILM2 ILIMIT GND Based on required ILIMIT threshold
RVTEMP VTEMP system Optional. VTEMP output filter resistor. 100Ω, and application dependent.
CVTEMP VTEMP GND Optional. VTEMP output filter capacitor < 130pF.
RAMP_G2 AMPOUT AMPIN+ Amplifier Gain Resistor 2. Application dependent.
RAMP_G1 AMPIN+ VAMP_REF Amplifier Gain Reistor 1. Application dependent.
RS SLx (SP) GND(SN) Low-side Rshunt resistor to measure motor phase current (ILS_PHASE ). The expected current senset output voltage = RS x ILS_PHASE x RAMP_G2/RAMP_G1 + VAMP_REF
VCC1 system GND System I/O reference voltage. 3.3V, 5V, or GVDD
VCC2 system GND System I/O reference voltage. 3.3V, 5V. VCC2 needs to be separated from VCC1 only if VCC1 is higher than 5V.
VAMP_bias RAMP_G2 system Optional. System Current Sense measurement bias voltage
Note: TI recommends connecting pull up on nFAULT pin even if not used.