SLVSHH5C August 2023 – May 2026 TPS25983
PRODUCTION DATA
The TPS25983xL (Current Limiter) variants respond to output overcurrent conditions by actively regulating the current to a set limit after a user adjustable fault blanking interval. During steady-state operation, if the load current exceeds a user adjustable overcurrent threshold (ILIM) set by the ILIM pin resistor (RILIM), but lower than the fast-trip threshold (IFT), the device starts discharging the ITIMER pin capacitor using an internal pull-down current (IITIMER). If the load current drops below the overcurrent threshold before the ITIMER capacitor voltage drops by ΔVITIMER, the current limit action is not engaged and the ITIMER is reset by pulling it up to VINT internally. This allows short transient overcurrent pulses to pass through the device without limiting the current. If the overcurrent condition persists, the ITIMER capacitor continues to discharge and once it falls by ΔVITIMER, the device regulates the FET gate voltage to actively limit the output current to the set ILIM level. The device exits current limiting when the load current falls below ILIM. Equation 5 can be used to calculate the RILIM value for a desired current limit.
Leaving the ILIM pin Open sets the overcurrent threshold to zero and causes the FET to shut off as soon as any load current is detected. Shorting the ILIM pin to ground at any point during normal operation is detected as a fault and the part shuts down. The ILIM pin Short to GND fault detection circuit does not allow any load current higher than ICB to flow through the device. This ensures robust eFuse behavior even under single point failure conditions. See also the Fault Response section for details on the device behavior after a fault.
The duration for which load transients are allowed can be adjusted using an appropriate capacitor value from ITIMER pin to ground. The transient overcurrent blanking interval can be calculated using Equation 6.
Leave the ITIMER pin open to allow the part to activate the current limit with the minimum possible delay. See also ITIMER Functional Mode Summary for more details.
Where
It is possible to avoid incorrect ITIMER pin fault assertion and achieve higher ITIMER intervals if needed by increasing the dVdt capacitor value accordingly, but at the expense of higher start-up time.
During current regulation, the output voltage drops resulting in increased device power dissipation across the FET. If the device internal temperature (TJ) exceeds the thermal shutdown threshold (TSD), the FET is turned off. See Overtemperature Protection (OTP) for more details on device response to overtemperature.