SLVSI54A May   2025  – May 2026 TPS60800-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Charge-Pump Output Resistance
      2. 7.3.2 Efficiency Considerations
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active-Schottky Diode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Capacitor Selection
        2. 8.2.2.2 Input Capacitor (CI)
        3. 8.2.2.3 Flying Capacitor (C(fly))
        4. 8.2.2.4 Output Capacitor (CO)
        5. 8.2.2.5 Power Dissipation
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 RC-Post Filter
      2. 8.3.2 Rail Splitter
      3. 8.3.3 Combined Doubler, Inverter
      4. 8.3.4 Cascading Devices
      5. 8.3.5 Paralleling Devices
      6. 8.3.6 Step-Down Charge Pump
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.5.1 Layout Guidelines

Solder all capacitors as close as possible to the IC. A PCB layout proposal for a dual-layer board is shown in Figure 8-10. Care has been taken to connect all capacitors as close as possible to the circuit to achieve optimized output voltage ripple performance. Please refer to the evaluation module user's guide in the product folder for more details on the layout.