SLVSJ50 February   2026 INA951-SEP

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Amplifier Input Common-Mode Signal
        1. 6.3.1.1 Input-Signal Bandwidth
        2. 6.3.1.2 Low Input Bias Current
        3. 6.3.1.3 Low VSENSE Operation
        4. 6.3.1.4 Wide Fixed Gain Output
        5. 6.3.1.5 Wide Supply Range
    4. 6.4 Device Functional Modes
      1. 6.4.1 Unidirectional Operation
      2. 6.4.2 High Signal Throughput
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 RSENSE and Device Gain Selection
      2. 7.1.2 Input Filtering
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Overload Recovery With Negative VSENSE
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.3.1.4 Wide Fixed Gain Output

The INA951-SEP gain error is < 0.15% at room temperature, with a maximum drift of 10ppm/°C over the full temperature range of –40°C to +125°C. The INA951-SEP is available in a gain option of 20V/V.

The INA951-SEP closed-loop gain is set by a precision, low drift internal resistor network. The ratio of these resistors are excellently matched, while the absolute values can vary significantly. Adding additional resistance around the INA951-SEP to change the effective gain is not recommended, however, because of this variation. The typical values of the gain resistors are described in Table 6-1.

Table 6-1 Fixed Gain Resistor
GAIN R1 RL
20 (V/V) 25kΩ 500kΩ