SLVSJ50A
February 2026 – July 2026
INA951-SEP
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Amplifier Input Common-Mode Signal
6.3.1.1
Input-Signal Bandwidth
6.3.1.2
Low Input Bias Current
6.3.1.3
Low VSENSE Operation
6.3.1.4
Wide Fixed Gain Output
6.3.1.5
Wide Supply Range
6.4
Device Functional Modes
6.4.1
Unidirectional Operation
6.4.2
High Signal Throughput
7
Application and Implementation
7.1
Application Information
7.1.1
RSENSE and Device Gain Selection
7.1.2
Input Filtering
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Overload Recovery With Negative VSENSE
7.2.3
Application Curve
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Receiving Notification of Documentation Updates
8.2
Support Resources
8.3
Trademarks
8.4
Electrostatic Discharge Caution
8.5
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
1
Features
VID v62/26605
Radiation - Total Ionizing Dose (TID):
TID performance assurance up to 30krad(Si)
Radiation Lot Acceptance Testing (RLAT) for every wafer lot up to
30krad(Si)
Radiation - Single-Event Effects (SEE):
Single Event Latch-Up (SEL) immune up to
43
MeV-cm
2
/mg at 125°C
Single Event Transient (SET) characterized up to LET =
47.5
MeV-cm2 /mg
Supports defense, aerospace, and medical applications
Operating temperature from –55°C to +125°C
Controlled baseline
Au bondwire and NiPdAu lead finish
Outgassing test performed per ASTM E595
One fabrication, assembly, and test site
Extended product life cycle
Product traceability
Wide common-mode voltage:
Operational voltage: −4V to +80V
Survival voltage: −20V to +85V
Excellent CMRR:
160dB DC-CMRR
85dB AC-CMRR at 50kHz
Accuracy:
Gain:
Gain error: ±0.15% (maximum)
Gain drift: ±10ppm/ °C (maximum)
Offset:
Offset voltage: ±30µV (typical)
Offset drift: ±0.05µV/ °C (typical)
Available gain:
INA951-SEP
A1,
: 20V/V
High bandwidth: 1.3MHz
Slew rate: 2.5V/µs
Quiescent current: 1.5mA