SLVSKK8A August   2026  – November 2026 LM7311

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO and UVP)
      2. 7.3.2 Overvoltage Lockout (OVLO)
      3. 7.3.3 Inrush Current, Overcurrent, and Short Circuit Protection
        1. 7.3.3.1 Slew Rate (dVdt) and Inrush Current Control
        2. 7.3.3.2 Short-Circuit Protection
        3. 7.3.3.3 Current Limit in Start-up
      4. 7.3.4 Analog Load Current Monitor
      5. 7.3.5 Reverse Current Protection
      6. 7.3.6 Overtemperature Protection (OTP)
      7. 7.3.7 Fault Response and Indication (FLT)
      8. 7.3.8 VDS Clamp Protection
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Single Device, Self-Controlled
    3. 8.3 Typical Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
        1. 8.3.2.1 Setting Undervoltage Threshold
        2. 8.3.2.2 Setting Output Voltage Rise Time (tR)
        3. 8.3.2.3 Setting Analog Current Monitor Voltage (IMON) Range
      3. 8.3.3 Application Curves
    4. 8.4 Active ORing
      1. 8.4.1 Active ORing Response
    5. 8.5 Power Supply Recommendations
      1. 8.5.1 Transient Protection
      2. 8.5.2 Output Short-Circuit Measurements
    6. 8.6 Layout
      1. 8.6.1 Layout Guidelines
      2. 8.6.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.3.7 Fault Response and Indication (FLT)

The following table summarizes the device response to various fault conditions.

Table 7-2 Fault Summary
EVENT PROTECTION RESPONSE FAULT LATCHED INTERNALLY FLT PIN STATUS DEVICE BEHAVIOR AFTER FAULT IS REMOVED

Overtemperature

Shutdown after TSD threshold

Y

L

 Auto Retry(LM7311A)
Latch off (LM7311L)

Undervoltage (UVP or UVLO) on VIN or EN

Shutdown

N

H

 Restart

Input Overvoltage

 Shutdown after TOVLOdeb

Y

L

 Latch off for both LM7311L and LM7311A

Output Short-Circuit to GND

Circuit Breaker followed by Current Limit

N

H

 Auto Retry.
Y after TSD L after TSD If TSD is hit during Current limit device behavior is Auto retry (LM7311A) or Latch off (LM7311L) depending on the variant

Reverse Current (VOUT - VIN)) > VREVTH)

Reverse Current Blocking

N

H

 Restart

Faults which are not latched internally are automatically cleared once the trigger condition goes away and thereafter the device recovers without any external intervention. Faults which are latched internally can be cleared either by power cycling the part (pulling VIN to 0V and then above VUVP(R)) or by pulling the EN/UVLO pin voltage below VSD(F)

Fault pin has a readback function. Pulling FLT pin low externally also turns off the device. The FLT pins of multiple eFuses can be tied up together tor turning them all off if one of them has a fault.

Note: At start-up, confirm that the FLT pin is not actively pulled low externally. This prevents the device from starting. It can be left floating as it has an internal weak pullup and the device powers up.