SLVSL42B January   2026  – May 2026 OPA2486 , OPA486

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for OPA486
    5. 5.5 Thermal Information for OPA2486
    6. 5.6 Thermal Information for OPA4486
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Common-Mode Range
      2. 6.3.2 Phase-Reversal Protection
      3. 6.3.3 Chopping Transients
      4. 6.3.4 EMI Rejection
      5. 6.3.5 Electrical Overstress
      6. 6.3.6 MUX-Friendly Inputs
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Basic Noise Calculations
    2. 7.2 Typical Applications
      1. 7.2.1 Instrumentation Amplifier
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Low Power Instrumentation Amplifier
      3. 7.2.3 Difference Amplifier
      4. 7.2.4 Resistance Temperature Detector (RTD)
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

OPA2486 OPA486 OPA4486 OPA486: D Package, 8-Pin SOIC (Top View)Figure 4-1 OPA486: D Package, 8-Pin SOIC (Top View)
OPA2486 OPA486 OPA4486 OPA486: DBV Package, 5-Pin SOT-23 (Top View)Figure 4-2 OPA486: DBV Package, 5-Pin SOT-23 (Top View)
Table 4-1 Pin Functions: OPA486
PIN TYPE DESCRIPTION
NAME NO.
D DBV
–IN 2 4 Input Inverting input
+IN 3 3 Input Noninverting input
NC 1, 8, 5 – _ No connection (can be left floating)
OUT 6 1 Output Output
V– 4 2 Power Negative (lowest) power supply
V+ 7 5 Power Positive (highest) power supply
OPA2486 OPA486 OPA4486 OPA2486: D Package, 8-Pin SOIC and DGK Package, 8-pin VSSOP (Top View)Figure 4-3 OPA2486: D Package, 8-Pin SOIC and DGK Package, 8-pin VSSOP (Top View)
Figure 4-4 DSG Package, 8-Pin WSON With Exposed Thermal Pad (Top View)
Table 4-2 Pin Functions: OPA2486
PIN TYPE DESCRIPTION
NAME NO.
–IN A 2 Input Inverting input channel A
–IN B 6 Input Inverting input channel B
+IN A 3 Input Noninverting input channel A
+IN B 5 Input Noninverting input channel B
OUT A 1 Output Output channel A
OUT B 7 Output Output channel B
V– 4 Power Negative supply
V+ 8 Power Positive supply
Thermal Pad(1) - - Connect thermal pad to the negative supply (V–). See also Packages with an Exposed Thermal Pad for more information.
(1) For DSG package only
OPA2486 OPA486 OPA4486 OPA4486: D Package, 14-Pin SOIC and PW Package, 14-Pin TSSOP (Top View)Figure 4-5 OPA4486: D Package, 14-Pin SOIC and PW Package, 14-Pin TSSOP (Top View)
Table 4-3 Pin Functions: OPA4486
PIN TYPE DESCRIPTION
NAME NO.
–IN A 2 Input Inverting input channel A
–IN B 6 Input Inverting input channel B
–IN C 9 Input Inverting input channel C
–IN D 13 Input Inverting input channel D
+IN A 3 Input Noninverting input channel A
+IN B 5 Input Noninverting input channel B
+IN C 10 Input Noninverting input channel C
+IN D 12 Input Noninverting input channel D
OUT A 1 Output Output channel A
OUT B 7 Output Output channel B
OUT C 8 Output Output channel C
OUT D 14 Output Output channel D
V– 11 Power Negative supply
V+ 4 Power Positive supply