SLVSM49
May 2026
LMG2104R022
,
LMG2104R044
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Device and Documentation Support
5.1
Documentation Support
5.1.1
Related Documentation
5.2
Receiving Notification of Documentation Updates
5.3
Support Resources
5.4
Trademarks
5.5
Electrostatic Discharge Caution
5.6
Glossary
6
Revision History
7
Mechanical, Packaging, and Orderable Information
7.1
Tape and Reel Information
7.2
Mechanical Data
1
Features
GaN half bridge power stage with integrated driver:
100V
(GaN FET options:
2.2mΩ, 4.4mΩ
)
Efficient and high-density power conversion with
Ultra-low propagation delay (20ns) and matching (2ns)
Independent turn-on and turn-off slew-rate control for both the GaN FETs
Zero-voltage detection (ZVD) reporting for dead-time optimization
Ideal diode mode (IDM) to reduce third quadrant losses in soft switching application
Input control flexibility
Independent input mode (IIM) control
Single PWM input with resistor programmable dead time option for IO-limited controllers
Robust protection
Interlock protection in IIM mode (LMG2104)
Internal bootstrap supply voltage regulation to prevent GaN FET overdrive
V
DS
monitoring based cycle-by-cycle short-circuit protection
Fault indication for over-temperature, supply under-voltage and short-circuit events
External bias power supply: 5V
Supports 3.3V and 5V input logic levels
Parasitic optimized QFN package with exposed top pad to support top-side cooling