SLVU097B
October 2003 – October 2021
Trademarks
1
Introduction
1.1
Background
1.2
Performance Specification Summary
1.3
Modifications
1.3.1
Output Voltage Setpoint
1.3.2
Switching Frequency
1.3.3
Input Filter
1.3.4
UVLO Programming
1.3.5
Synchronization
1.3.6
Power Good
1.3.7
Synchronous Low-Side FET
1.3.8
Optional Output Filtering
2
Test Setup and Results
2.1
Input/Output Connections
2.2
Efficiency
2.3
Power Dissipation
2.4
Output Voltage Regulation
2.5
Load Transients
2.6
Loop Characteristic
2.7
Output Voltage Ripple
2.8
Input Voltage Ripple
2.9
Gate Drive
2.10
Powering Up and Down
3
Board Layout
3.1
Layout
4
Schematic and Bill of Materials
4.1
Bill of Materials
5
Revision History
Trademarks
All trademarks are the property of their respective owners.