SLVU358A February   2010  – January 2022 TPS51513

 

  1.   Trademarks
  2. 1 Description
    1. 1.1 Typical Application
    2. 1.2 Features
  3. 2 Electrical Performance Specifications
  4. 3 Schematic
  5. 4 Test Setup
    1. 4.1 Test Equipment
    2. 4.2 Recommended Test Setup
  6. 5 Configuration
    1. 5.1 Current Limit Trip Selection (J8: Trip Select)
    2. 5.2 Frequency Selection (J7: TON Select)
    3. 5.3 Overshoot Reduction Selection (J9: OSRTM Select)
    4. 5.4 VID Bits Selection (S1)
    5. 5.5 Sleep Mode Selection (SLP)
    6. 5.6 1.2-V Output Voltage Option (J10: VOUT selection)
  7. 6 Test Procedure
    1. 6.1 Line/Load Regulation and Efficiency Measurement Procedure
    2. 6.2 List of Test Points
    3. 6.3 Equipment Shutdown
  8. 7 Performance Data and Typical Characteristic Curves
    1. 7.1  Efficiency
    2. 7.2  Load Regulation
    3. 7.3  Line Regulation
    4. 7.4  Current Monitor Voltage
    5. 7.5  Output Ripple
    6. 7.6  Switching Node
    7. 7.7  Output Transient
    8. 7.8  Turn-On Waveform
    9. 7.9  Turn-Off Waveform
    10. 7.10 Bode Plot
  9. 8 EVM Assembly Drawing and PCB Layout
  10. 9 Bill of Materials
  11. 10Revision History

1 Description

The TPS51513EVM-549 is designed to use a regulated 12-V (8-V to 14-V) bus to produce a high-current, regulated variable output at up to 20 A of the load current. The output voltage varies from 0.70 V to 1.05 V through a 3-bit VID digital-to-analog converter (DAC). The TPS51513EVM-549 is designed to demonstrate the TPS51513 in a typical low-voltage application while providing a number of test points to evaluate the performance of the TPS51513.