SLVU719B May   2012  – November 2021 TPS53819A

 

  1.   Trademarks
  2. 1 Description
    1. 1.1 Typical Applications
    2. 1.2 Features
  3. 2 Electrical Performance Specifications
  4. 3 Schematic
  5. 4 Test Setup
    1. 4.1 Test and Configuration Software
      1. 4.1.1 Description
      2. 4.1.2 Features
    2. 4.2 Test Equipment
    3. 4.3 Recommended Test Setup
      1. 4.3.1 Input Connections
      2. 4.3.2 Output Connections
      3. 4.3.3 Other Connections
    4. 4.4 List of Test Points
    5. 4.5 Jumper Configuration: Enable Selection
  6. 5 EVM Configuration Using the Fusion GUI
    1. 5.1 Configuration Procedure
    2. 5.2 Default Fusion GUI Screenshots and Description
  7. 6 Test Procedure
    1. 6.1 Line and Load Regulation and Efficiency Measurement Procedure
    2. 6.2 Control Loop Gain and Phase Measurement Procedure
    3. 6.3 Equipment Shutdown
  8. 7 Performance Data and Typical Characteristic Curves
    1. 7.1  Efficiency
    2. 7.2  Load Regulation
    3. 7.3  Line Regulation
    4. 7.4  fSW Versus Load
    5. 7.5  Bode Plot
    6. 7.6  Transient Response
    7. 7.7  Output Ripple
    8. 7.8  Switching Node
    9. 7.9  Turn-On Waveform
    10. 7.10 Turn-Off Waveform
    11. 7.11 Pre-bias Turn-On Waveform
    12. 7.12 Thermal Images
  9. 8 EVM Assembly Drawing and PCB layout
  10. 9 Bill of Materials
  11. 10Revision History

1.2 Features

  • Regulated 1.2-V output, marginable and trimmable through the PMBus interface
  • 25-A DC steady state output current
  • D-CAP2™ mode control supporting all ceramic output capacitors
  • Programmable soft start through the PMBus interface
  • Programmable enable function through the PMBus interface
  • Fault report through the PMBus interface
  • J2 for external enable function
  • Supports pre-bias output voltage start-up
  • High efficiency and high-power density by using a TI power block MOSFET
  • Convenient test points for probing critical waveforms
  • Cycle-by-cycle valley overcurrent limit protection