SLVUC13 February   2022 TPS62872 , TPS62873

 

  1.   Trademarks
  2. 1Warning and Caution
  3. 2Introduction
    1. 2.1 Performance Specification
    2. 2.2 Modifications
      1. 2.2.1 Input and Output Capacitors
      2. 2.2.2 Output Voltage Setting
      3. 2.2.3 Control Loop Compensation
      4. 2.2.4 Switching Frequency Setting
      5. 2.2.5 I2C Interface
  4. 3Setup
    1. 3.1 Connector Descriptions
    2. 3.2 Hardware Setup
  5. 4TPS62873EVM-143 Test Results
  6. 5Board Layout
  7. 6Schematic and Bill of Materials
    1. 6.1 Schematic
    2. 6.2 Bill of Materials

Board Layout

This section provides the TPS62873EVM-143 board layout. The gerber files are available on the TPS62873EVM-143 tool page.

GUID-20210520-CA0I-61WL-VZBN-QWKFMBJ7N687-low.gifFigure 5-1 Top Silk
GUID-20210520-CA0I-K13K-MP68-H29HDCQZ67DP-low.gifFigure 5-3 Layer 2
GUID-20210520-CA0I-S966-SBFS-RPZ3QGDC32CF-low.gifFigure 5-5 Layer 4
GUID-20210520-CA0I-SRPM-KZLV-PZD3XSKV02PV-low.gifFigure 5-7 Layer 6
GUID-20210520-CA0I-79XC-KBMM-9CNDLH9MNXMN-low.gifFigure 5-9 Bottom Layer
GUID-20210520-CA0I-FCQM-QHCT-THSHFCBCHCLG-low.gifFigure 5-2 Top Layer
GUID-20210520-CA0I-ND76-BFCW-S0JH970J5S1M-low.gifFigure 5-4 Layer 3
GUID-20210520-CA0I-NR6C-6RJV-0JSZ0CNQFMDB-low.gifFigure 5-6 Layer 5
GUID-20210520-CA0I-XXBQ-8X92-MVBPLMT4WPPG-low.gifFigure 5-8 Layer 7