SLVUCR8A September   2023  – March 2024 TPS25751

 

  1.   1
  2.   Read This First
    1.     Notational Conventions
    2.     Glossary
    3.     Related Documents
    4.     Support Resources
    5.     Trademarks
  3. 1Introduction
    1. 1.1 Introduction
      1. 1.1.1 Purpose and Scope
    2. 1.2 PD Controller Host Interface Description
      1. 1.2.1 Overview
      2. 1.2.2 Register and Field Notation
    3. 1.3 Unique Address Interface
      1. 1.3.1 Unique Address Interface Protocol
  4. 2PD Controller Policy Modes
    1. 2.1 Overview
    2. 2.2 Source Policy Mode
    3. 2.3 Sink Policy Mode
  5. 3TPS25751 Registers
  6. 44CC Task Detailed Descriptions
    1. 4.1 CPU Control Tasks
      1. 4.1.1 'Gaid' - Return to Normal Operation
      2. 4.1.2 'GAID' - Cold Reset Request
    2. 4.2 PD Message Tasks
      1. 4.2.1 'SWSk' - PD PR_Swap to Sink
      2. 4.2.2 'SWSr' - PD PR_Swap to Source
      3. 4.2.3 'SWDF' - PD DR_Swap to DFP
      4. 4.2.4 'SWUF' - PD DR_Swap to UFP
      5. 4.2.5 'GSkC' - PD Get Sink Capabilities
      6. 4.2.6 'GSrC' - PD Get Source Capabilities
      7. 4.2.7 'GPPI' - PD Get Port Partner Information
      8. 4.2.8 'SSrC' - PD Send Source Capabilities
      9. 4.2.9 'MBRd' - Message Buffer Read
    3. 4.3 Patch Bundle Update Tasks
      1. 4.3.1 'PBMs' - Start Patch Burst Mode Download Sequence
      2. 4.3.2 'PBMc' - Patch Burst Mode Download Complete
      3. 4.3.3 'PBMe' - End Patch Burst Mode Download Sequence
      4. 4.3.4 'GO2P' - Go to Patch Mode
    4. 4.4 System Tasks
      1. 4.4.1 'DBfg' - Clear Dead Battery Flag
      2. 4.4.2 'I2Cr' - I2C Read Transaction
      3. 4.4.3 'I2Cw' - I2C Write Transaction
  7. 5User Reference
    1. 5.1 PD Controller Application Customization
    2. 5.2 Loading a Patch Bundle
    3. 5.3 GPIO Events
    4. 5.4 AUTO_NEGOTIATE_SINK Register
      1. 5.4.1 AUTO_NEGOTIATE_SINK Usage Example 1
      2. 5.4.2 AUTO_NEGOTIATE_SINK Usage Example 2
      3. 5.4.3 AUTO_NEGOTIATE_SINK Usage Example 3
      4. 5.4.4 AUTO_NEGOTIATE_SINK Usage Example 4
  8. 6Revision History

Overview

The PD Controller provides one I2C target. The I2Ct target is meant to be connected to an Embedded Controller (EC).

The Host Interface defines how the registers are accessed from I2C target port and target addresses. Target Address #1 is selected by the customer using the ADCIN1 and ADCIN2 pins on the PD controller. See also Table 5-1 for more details about the target addresses.

The Host Interface provides general status information to the controller of these I2C interfaces about the PD Controller, ability to control the PD Controller, status of USB Type-C® Port and communications to/from a connected device (Port Partner) and/or cable plug through USB PD messages. All Host Interface communication that uses the Unique I2C address is referred to as Unique Address Interface.

The PD Controller supports a register-based Unique Address Interface. Section 3 lists the Unique Address Interface registers and provides detailed Unique Address Interface register descriptions.

The key to the protocol diagrams is in the SMBus Specification, version 2.0 and is repeated here in part in Figure 1-1.

GUID-20230530-SS0I-0BTG-SDFF-1CNZB5VB8NCQ-low.svg Figure 1-1 I2C Read/Write Protocol Key