SLVUCV2 September   2024 TPS4HC120-Q1

 

  1.   1
  2.   Description
  3.   3
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Connection Descriptions
      1. 2.1.1 Connections and Test Points
      2. 2.1.2 Jumper Configurations
  9. 3Implementation Results
    1. 3.1 Variable Resistor for CS and CL
      1. 3.1.1 Current Sense Resistor
      2. 3.1.2 Adjustable Current Limit
  10. 4Hardware Design Files
    1. 4.1 TPS4HC120-Q1 Schematic
    2. 4.2 TPS4HC120-Q1 EVM Assembly Drawings and Layout
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks

2.1.1 Connections and Test Points

Connector and Test Point Description

J4, TP6

Supply voltage VS

J24, TP15

Output voltage OUT1

J25, TP16

 Output voltage OUT2

J26, TP17

 Output voltage OUT3

J27, TP18

 Output voltage OUT4

J5, TP13, TP14, and TP19-TP22

System GND

TP14

GND_IC test point

TP10, TP1, TP2, and TP3

ENABLE test points EN1-EN4

TP4, TP5

SELx test points SEL0-SEL1

TP11

DIAG_EN test point

TP7

FLT test point

TP8

LPM test point

TP9

SNS test point
J14 (GPIO connection)

1 connects to FLT pin, 2 connects to LPM pin, and 3 connects to SNS pin.