SLVUCX1 September   2024 TPS548B23

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Configurations and Modifications
      1. 2.1.1 Multifunction Configuration (CFG1-5) Pins Selection
      2. 2.1.2 Setting Output Voltage Using External Feedback Configuration
  9. 3Implementation Results
    1. 3.1 Test Setup and Results
      1. 3.1.1 Input and Output Connections
      2. 3.1.2 Efficiency
      3. 3.1.3 Output Voltage Regulation
      4. 3.1.4 Load Transient and Loop Response
      5. 3.1.5 Output Voltage Ripple
      6. 3.1.6 Start-up and Shutdown with EN
      7. 3.1.7 Thermal Performance
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 Board Layout
      1. 4.2.1 Layout
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks

3.1.1 Input and Output Connections

The TPS548B23EVM is provided with input connectors, output connectors, and test points as shown in Table 3-1 and Table 3-2.

To support the minimum input voltage with the full rated load on both outputs with the default EVM, a power supply capable of supplying greater than 10A must be connected to the VIN and PGND terminal blocks (T1) through a pair of 18-AWG wires or better.

The load must be connected to T2. A pair of 10AWG wires or better must be used for each connection. With the maximum current limit setting, the maximum load current capability is near TBD A before the TPS548B23 goes into current limit. Wire lengths must be minimized to reduce losses in the wires.

Table 3-1 Connectors and Jumpers
REFERENCE DESIGNATOR NAME FUNCTION
T1 VIN VIN screw terminal to connect input voltage
T2 VOUT VOUT screw terminal to connect load to output
JP1 EN EN pin selection header:

  • Short EN – PVIN DIVIDER: EN pin connected to VIN pin through resistor divider (default)
  • Short EN – GND: EN pin shorted to GND
  • Open: Float EN
JP2 PG PG pin selection header:

  • Short: PG pulled up to VCC pin through a 10kΩ resistor (default)
  • Open: Float PG
JP3 CFG1 CFG1 selection header. Use shunt to select VCC, GND, or Float
JP4 CFG2 CFG2 selection header. Use shunt to select VCC, GND, or Float
JP5 CFG3 CFG3 selection header. Use shunt to select VCC, GND, or Float
JP6 CFG4 CFG4 selection header. Use shunt to select VCC, GND, or Float
JP7 CFG5 CFG5 selection header. Use shunt to select VCC, GND, or Float
Table 3-2 Test Points
REFERENCE DESIGNATOR NAME FUNCTION
TP1 VIN_S VIN test point. Use this for efficiency measurements.
TP2 VOUT_S VOUT test point. Use this for efficiency, output regulation, and bode plot measurements.
TP3 SW SW node test point
TP4 VIN VIN test point
TP5 VOUT VOUT test point
TP6 PGND PGND test point
TP7 PGND PGND test point
TP8 VCC VCC test point
TP9 BODE-/VOS Test point between voltage divider network and output voltage. Used for Bode plot measurements.
TP10 BODE+/VOUT_REG Test point between voltage divider network and output voltage. Used for Bode plot measurements.
TP11 EN EN test point
TP12 PG PG test point (pulled up to VCC pin through a 10kΩ resistor)
TP13 GOS GOS test point
TP14 SW SMB connector to measure SW node. When using this test point, set the scope for 50Ω termination. The combination of 50Ω termination and 450Ω series resistance creates a 10:1 attenuation.
TP15 VOUT SMB connector to measure output voltage. When using this test point, set the scope for 1MΩ termination. When using 50Ω termination, a 2:1 divider is created.
TP16 AGND AGND test point
TP17 AGND AGND test point
TP18 PGND_S PGND test point. Use this for efficiency measurements.
TP19 PGND_S PGND test point. Use this for efficiency measurements.