SLVUDJ1 January   2026

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
      1. 1.4.1 TPS7N59
      2. 1.4.2 LMG1020 Low Side Driver
  6. 2Hardware
    1. 2.1 EVM Setup
      1. 2.1.1 LDO Input/Output Connector Descriptions
        1. 2.1.1.1 VIN and GND
        2. 2.1.1.2 BIAS and GND
        3. 2.1.1.3 VOUT and GND
        4. 2.1.1.4 EN
      2. 2.1.2 Optional Load Transient Input/Output Connector Descriptions
        1. 2.1.2.1 VDD and GND
        2. 2.1.2.2 J12
        3. 2.1.2.3 J14
        4. 2.1.2.4 J16
        5. 2.1.2.5 J13
        6. 2.1.2.6 J17
      3. 2.1.3 TPS7N59 LDO Operation
      4. 2.1.4 Optional Load Transient Circuit Operation
      5. 2.1.5 Inputs/Outputs Connectors and Jumper Descriptions
        1. 2.1.5.1 J20, J22 – IN
        2. 2.1.5.2 J8 – OUT
        3. 2.1.5.3 TP1 – REF
        4. 2.1.5.4 TP2 – PG
        5. 2.1.5.5 TP3 – NR/SS
        6. 2.1.5.6 TP4, TP5, TP6 – GND
      6. 2.1.6 Soldering Guidelines
      7. 2.1.7 Equipment Connections
  7. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 PCB Layout
    3. 3.3 Bill of Materials (BOM)

1.3 Specification

The adjustable TPS7N59EVM-184 can accept an input voltage between 0.7V to 6.0V and provide an output voltage between 0.5V to 5.2V. The TPS7N59 is a 10A LDO (150mV dropout (typical) at 10A) with ultra-low output voltage noise (2.5μVRMS), high accuracy (1% (max) accuracy over line, load, and temperature), and high Power-supply rejection ratio (– 84dB at 1kHz, – 64dB at 10kHz, – 49dB at 100kHz, and – 30dB at 1MHz). The TPS7N59 also provides adjustable soft-start inrush control and an open-drain power-good (PG) signal. The small 24-pin WQFN package (4mm × 4mm) has excellent thermal resistance for high power operation. The RθJA for the TPS7N59EVM-184 is 14.3°C/W.