SNAA378 January   2023 LMX1204

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Test Setup
  5. 3Measurement Results
    1. 3.1 Input/Output Return Loss
    2. 3.2 Group Delay
    3. 3.3 Phase Error Within One LMX1204 Device
    4. 3.4 Phase Error Across all LMX1204 Channels
  6. 4Conclusion
  7. 5References

3.1 Input/Output Return Loss

Figure 3-1 shows the input and output return loss of the cascaded LMX1204 reference design. Both responses show return loss performance less than –10 dB indicating a good 50-Ω match and transmission lines on the board.

GUID-20221207-SS0I-0SSP-9NQK-FF5LXNBWDMVH-low.png Figure 3-1 Input/Output Return Loss