SNAS875A February   2025  – June 2025 LMR60430-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Undervoltage Lockout (UVLO)
      2. 7.3.2 Soft Start and Recovery from Dropout
      3. 7.3.3 Frequency Selection With RT
      4. 7.3.4 MODE/SYNC Pin Control
      5. 7.3.5 Output Voltage Selection
      6. 7.3.6 Current Limit
      7. 7.3.7 Hiccup Mode
      8. 7.3.8 Power-Good Function
      9. 7.3.9 Spread Spectrum
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
      2. 7.4.2 Active Mode
        1. 7.4.2.1 Continuous Conduction Mode (CCM)
        2. 7.4.2.2 Auto Mode - Light Load Operation
        3. 7.4.2.3 FPWM Operation - Light Load Operation
        4. 7.4.2.4 Minimum On-Time
        5. 7.4.2.5 Dropout
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency Selection
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Bootstrap Capacitor (CBOOT) Selection
        6. 8.2.2.6 FB Voltage Divider for Adjustable Output Voltages
          1. 8.2.2.6.1 Feedforward Capacitor (CFF) Selection
        7. 8.2.2.7 RPG - PG Pullup Resistor
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Ground and Thermal Plane Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.2 Typical Application

Figure 8-1 shows a typical application circuit for the LMR60430-Q1. This device is designed to function over a wide range of external components and system parameters. As a quick-start guide, Table 8-2 provides typical component values for a range of the most common operating conditions.

LMR60430-Q1 LMR60430-Q1 Reference Schematic
Note: The fourth option for the MODE/SYNC pin is to connect this pin directly to RT. In this configuration, the device operates in FPWM by default. Table 8-1 describes the mode of operation for each of the MODE/SYNC pin configurations. See Section 7.3.4 for details.
Figure 8-1 LMR60430-Q1 Reference Schematic
Table 8-1 Decription of MODE/SYNC Pin Options
MODE/SYNC PIN CONFIGURATION MODE OF OPERATION
Option 1 Clock Synchronization
Option 2 FPWM
Option 3 Auto
Option 4 FPWM
Table 8-2 Recommended Passive Components
FSW (kHz) VOUT (V) IOUT (A) L (μH) COUT(1) RFBT (kΩ) RFBB (kΩ) CIN (μF) CBOOT (nF) RT (kΩ)
400 3.3 3 6.8 54 SHUNT DNP 4.7 100 86.6
400 3.8 3 6.8 54 SHUNT DNP 4.7 100 86.6
400 5 3 8.2 54 SHUNT DNP 4.7 100 86.6
1000 3.3 3 2.2 44 SHUNT DNP 4.7 100 34
1000 3.8 3 3.3 44 SHUNT DNP 4.7 100 34
1000 5 3 3.3 44 SHUNT DNP 4.7 100 34
2000 3.3 3 1.5 20 SHUNT DNP 4.7 100 16.5
2000 3.8 3 1.5 20 SHUNT DNP 4.7 100 16.5
2000 5 3 1.5 20 SHUNT DNP 4.7 100 16.5
(1) Rated capacitance