SNAU259 August   2021

 

  1.   Trademarks
  2. 1 Features
  3. 2 General Description
  4. 3 Signal Path and Control Circuitry
  5. 4 Getting Started
  6. 5 Power Supply Connection
  7. 6 Input Clock Selection
    1. 6.1 Differential Input
    2. 6.2 Configuring Single-Ended Input
  8. 7 Output Clock
  9. 8 EVM Board Schematic
  10. 9 REACH Compliance
  11. 10Bill of Materials

6.2 Configuring Single-Ended Input

Single-ended input must be configured by replacing or removing passive components on the board. Follow Table 6-1 for proper configuration of single-ended input.

Table 6-1 Single-Ended Configurations by Bias Voltage
BIAS VOLTAGE TO INx_N (V) INPUT TO INx_P (V) INPUT REMOVE BIASING RESISTOR REMOVE COMMON-MODE RESISTOR REPLACE WITH 0-Ω RESISTOR REPLACE WITH 100-Ω RESISTOR
0.9 1.8 (LVCMOS)

IN0_N

R2

R4

R38

C1

N/A

IN0_P

C7

N/A
0.9 1.8 (LVCMOS)

IN1_N

R8

R10

R39

C8

N/A

IN1_P

C11

N/A
1.25 2.5 (LVCMOS)

IN0_N

R4

R38

R3

C1, C7

R1

R2

IN0_P
1.25 2.5 (LVCMOS)

IN1_N

R10

R39

R9

C8, C11

R6

R8

IN1_P

1.65

 3.3 (LVCMOS)

IN0_N

R4

R38

R3

C1, C7

R1

R2

IN0_P
1.65 3.3 (LVCMOS)

IN1_N

R10

R39

R9

C8, C11

R6

R8

IN1_P