SNIS137G August   2004  – August 2019 LM95071

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Temperature Monitor Application
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Function
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Ratings
    4. 6.4 Thermal Information
    5. 6.5 Temperature-to-Digital Converter Characteristics
    6. 6.6 Logic Electrical Characteristics - Digital DC Characteristics
    7. 6.7 Logic Electrical Characteristics - Serial Bus Digital Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Up and Power Down
      2. 8.3.2 Temperature Data Format
      3. 8.3.3 Tight Accuracy, Fine Resolution and Low Noise
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode/Manufacturer ID
    5. 8.5 Programming
      1. 8.5.1 Serial Bus Interface
      2. 8.5.2 Serial Bus Timing Diagrams
    6. 8.6 Register Maps
      1. 8.6.1 Internal Register Structure
        1. 8.6.1.1 Configuration Register
        2. 8.6.1.2 Temperature Register
        3. 8.6.1.3 Manufacturer/Device ID Register
  9. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Community Resource
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Logic Electrical Characteristics - Serial Bus Digital Switching Characteristics

Unless otherwise noted, these specifications apply for VDD = 2.4 V to 5.5 V(1); CL (load capacitance) on output lines = 100 pF unless otherwise specified.
MIN(2) TYP(1) MAX(2) UNIT
t1 SC (Clock) Period TA = TJ = TMIN to TMAX 0.16 µs
TA = TJ = +25°C DC
t2 CS Low to SC (Clock) High Set-Up Time TA = TJ = TMIN to TMAX 100 ns
t3 CS Low to Data Out (SO) Delay TA = TJ = TMIN to TMAX 70 ns
t4 SC (Clock) Low to Data Out (SO) Delay TA = TJ = TMIN to TMAX 70 ns
t5 CS High to Data Out (SO) TRI-STATE TA = TJ = TMIN to TMAX 200 ns
t6 SC (Clock) High to Data In (SI) Hold Time TA = TJ = TMIN to TMAX 50 ns
t7 Data In (SI) Set-Up Time to SC (Clock) High TA = TJ = TMIN to TMAX 30 ns
t8 SC (Clock) High to CS High Hold Time TA = TJ = TMIN to TMAX 50 ns