SNLA429A November 2023 – April 2025 LMKDB1108 , LMKDB1120
Table 5-1 is the PCIe compliance results summary for the LMKDB1xxx phase noise analysis, which demonstrates the jitter compliance of the device for PCIe Gen 1 through 6, noise folds 0 and 3, and clock architectures Common Clock (CC) and Separate Reference No Spread (SRNS).
A PCIe jitter spec or time domain calculation can have one of the following statuses:
| Jitter Filter | Clock Arch. | Noise Fold | Min (fs) | Max (fs) | Limit (fs) | Status |
|---|---|---|---|---|---|---|
| PCIe1 | CC | 0 | 0.0 | 627 | 86,000 | PASS |
| 3 | 0.0 | 710 | 86,000 | PASS | ||
| SRNS | 0 | N/A | N/A | N/A | N/A | |
| 3 | N/A | N/A | N/A | N/A | ||
| PCIe2 | CC | 0 | 20 | 60 | 3,100 | PASS |
| 3 | 23 | 71 | 3,100 | PASS | ||
| SRNS | 0 | 27 | 71 | N/A | N/A | |
| 3 | 31 | 80 | N/A | N/A | ||
| PCIe3 | CC | 0 | 6 | 18 | 1,000 | PASS |
| 3 | 7 | 21 | 1,000 | PASS | ||
| SRNS | 0 | 18 | 21 | N/A | N/A | |
| 3 | 21 | 25 | N/A | N/A | ||
| PCIe4 | CC | 0 | 6.193 | 17.672 | 500.0 | PASS |
| 3 | 7.471 | 20.997 | 500.0 | PASS | ||
| SRNS | 0 | 7.901 | 21.219 | N/A | N/A | |
| 3 | 9.082 | 24.523 | N/A | N/A | ||
| PCIe5 | CC | 0 | 1.344 | 6.872 | 150.0 | PASS |
| 3 | 1.669 | 8.539 | 150.0 | PASS | ||
| SRNS | 0 | 1.676 | 8.346 | N/A | N/A | |
| 3 | 1.952 | 9.747 | N/A | N/A | ||
| PCIe6 | CC | 0 | 1.564 | 4.456 | 100.0 | PASS |
| 3 | 1.878 | 5.353 | 100.0 | PASS | ||
| SR | 0 | 2.343 | 6.621 | N/A | N/A | |
| 3 | 2.659 | 7.517 | N/A | N/A | ||
| PCIe7 | CC | 0 | 1.194 | 3.408 | 67.0 | PASS |
| 3 | 1.397 | 3.987 | 67.0 | PASS | ||
| SR | 0 | 1.767 | 5.021 | N/A | N/A | |
| 3 | 1.973 | 5.606 | N/A | N/A |
Table 5-2 is the PCIe compliance summary for the LMKDB1xxx time domain analysis which demonstrates the time domain compliance of the device.
| Calculation | Min | Avg | Max | Limit | Status |
|---|---|---|---|---|---|
| Vcross | 330.09mV | 343.67mV | 357.31mV | 250mV to 550mV | PASS |
| Vhigh | 758.527mV | 758.527mV | 150mV mV | PASS | |
| Vlow | –42.394 mV | –42.394 mV | –150 mV mV | PASS | |
| Period | 9.971ns | 10.0ns | 10.022ns | 9.847ns to 10.203ns | PASS |
| Duty Cycle | 49.441% | 49.624% | 49.825% | 40% to 60% | PASS |
| Overshoot Voltage | 72.83mV | 91.34mV | 300mV | PASS | |
| Undershoot Voltage | –57.47mV | –70.69mV | –300mV | PASS | |
| Rising Edge Rate | 2.14V/ns | 2.419V/ns | 2.718V/ns | 0.6V/ns to 4.0V/ns | PASS |
| Falling Edge Rate | 2.24V/ns | 2.508V/ns | 2.818V/ns | 0.6V/ns to 4.0V/ns | PASS |