2 Test Setup

TI’s PCIe Compliance Reports display the analysis of a device’s phase noise or jitter in regards to meeting PCIe requirements. This PCIe compliance report displays test results under typical conditions. For the LMKDB1xxx family the operating temperature is at 25°C and the supply voltage is at 3.3 V.

The hardware setup consists of a device under test, power supply, signal generator, attenuators, limiter, balun (for frequency domain measurement only), thermal force unit, test load board, and phase noise analyzer (PNA, for frequency domain measurement) or oscilloscope (for time domain measurement). The device receives an input clock from an SMA100B signal generator, which outputs a sine wave. However, because TI's clocking parts expect a square wave at a specific amplitude and slew rate for the reference input, the output of the SMA100B is passed through several attenuators and a limiter. The LMKDB1xxx family of parts require a slew rate of 3.5 V/ns and peak-to-peak swing of 1.6 Vpp, which was achieved with said setup.

For the frequency domain measurements, the differential outputs of the device are connected to a balun to convert them to a single-ended signal and then route that signal to a PNA, as shown on Figure 2-1.

Figure 2-1 TI's PCIe Compliance Test Hardware Setup for Frequency Domain Measurements

For time domain measurements, the differential outputs (both positive and negative pins) of the device are routed directly to an oscilloscope, as shown on Figure 2-2. Also, when obtaining data for the time domain measurements, the PCIe test load is a 15 dB loss trace at 4 GHz.

Figure 2-2 TI's PCIe Compliance Test Hardware Setup for Time Domain Measurements