SNLS766A July   2024  – April 2026 TDP20MB421

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 DC Electrical Characteristics
    6. 5.6 High-Speed Electrical Characteristics
    7. 5.7 SMBUS/I2C Timing Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 5-Level Control Inputs
      2. 6.3.2 Linear Equalization
      3. 6.3.3 Flat Gain
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
      2. 6.4.2 Standby Mode
    5. 6.5 Programming
      1. 6.5.1 Pin Mode
      2. 6.5.2 SMBUS/I2C Register Control Interface
        1. 6.5.2.1 Shared Registers
        2. 6.5.2.2 Channel Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 DP 2.1 and HDMI 2.1 Mainlink Signal Conditioning
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.4 Thermal Information

THERMAL METRIC(1) TDP20MB421 UNIT
RUA, 42 Pins
RθJA-High K Junction-to-ambient thermal resistance 26.1 ℃/W
RθJC(top) Junction-to-case (top) thermal resistance 14.1 ℃/W
RθJB Junction-to-board thermal resistance 8.7 ℃/W
ψJT Junction-to-top characterization parameter 1.6 ℃/W
ψJB Junction-to-board characterization parameter 8.6 ℃/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 2.6 ℃/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.