SNLS777B May   2024  – September 2026 DP83TG721R-Q1 , DP83TG721S-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Device Comparison Table
  6. 5Application Information
    1. 5.1 Time Synchronization
    2. 5.2 Integrated Audio Over Ethernet
    3. 5.3 TC10 Sleep/Wake-Up
    4. 5.4 DP83TG721 EVM-MC and Software Support
    5. 5.5 Comparison of Device Features
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  8. 7Revision History
  9. 8Mechanical, Packaging, and Orderable Information

5.1 Time Synchronization

The DP83TG721-Q1 integrates IEEE 1588v2/802.1AS timestamping and other additional hardware engine to offer sub-15 nanosecond synchronization accuracy.

The DP83TG721-Q1 also can provide a wide range of high quality time synchronized clock (from 1KHz to 50MHz) and generate synchronous patterns on GPIOs. This enables the DP83TG721-Q1 to achieve system-level synchronization for ADAS sensor data synchronization, Corner Radar Chirp synchronization, 1pps signal for GPS, LIDAR, V2x, and so forth.

DP83TG721R-Q1 DP83TG721S-Q1 DP83TG721-Q1 802.1AS Time Synchronization Architecture Figure 5-1 DP83TG721-Q1 802.1AS Time Synchronization Architecture