SNOS753F August   1999  – January 2025 LMC7111

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics for VS = 2.7V or ±1.35V
    6. 5.6  Electrical Characteristics for VS = 5V or ±2.5V
    7. 5.7  Electrical Characteristics for VS = 10V or ±5V
    8. 5.8  Typical Characteristics
    9. 5.9  Typical Characteristics: 2.7V
    10. 5.10 Typical Characteristics: 3V
    11. 5.11 Typical Characteristics: 5V
    12. 5.12 Typical Characteristics: 10V
  7. 6 Detailed Description
    1. 6.1 Feature Description
      1. 6.1.1 Benefits of the LMC7111 Tiny Amp
        1. 6.1.1.1 Size
        2. 6.1.1.2 Height
        3. 6.1.1.3 Signal Integrity
        4. 6.1.1.4 Simplified Board Layout
        5. 6.1.1.5 Low Supply Current
        6. 6.1.1.6 Wide Voltage Range
      2. 6.1.2 Input Common-Mode Voltage Range
      3. 6.1.3 Output Swing
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Capacitive Load Tolerance
      2. 7.1.2 Compensating for Input Capacitance When Using Large-Value Feedback Resistors
      3. 7.1.3 Dual and Quad Devices With Similar Performance
    2. 7.2 Typical Application
      1. 7.2.1 Biasing GaAs RF Amplifiers
      2. 7.2.2 Reference Buffer for Analog-to-Digital Converters
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Spice Macromodel
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.6 Electrical Characteristics for VS = 5V or ±2.5V

at TA = +25°C, V+ = 5V, V– = 0V, VCM = VO = VS / 2, and RL > 1MΩ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage ±0.9 mV
dVOS/dT Input offset voltage drift TJ = –40°C to +85°C 2 µV/°C
PSRR Power-supply rejection ratio Positive, 5V < V+ < 10V, V– = 0V 60 85 dB
Negative, –5V < V– < –10V, V+ = 0V 60 85
INPUT BIAS CURRENT
IB Input bias current (1) ±0.1 ±1 pA
TJ = –40°C to +85°C ±20
IOS Input offset current (1) ±.01 ±0.5 pA
TJ = –40°C to +85°C ±10
NOISE
INPUT VOLTAGE
VCM Common-mode voltage range To positive rail
CMRR ≥ 50dB		 5.20 5.25 V
TJ = –40°C to +85°C 5.0
To negative rail
CMRR ≥ 50dB		 –0.3 –0.2
TJ = –40°C to +85°C 0.0
CMRR Common-mode rejection ratio  0V < VCM < 5V 60 85 dB
INPUT IMPEDANCE
RIN Input resistance >10 TΩ
CIN Common mode input capacitance 3 pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain Sourcing 500 V/mV
Sinking 200
FREQUENCY RESPONSE
GBW Gain bandwidth product 50 kHz
SR Slew rate  Voltage follower with 1V step input,
RL = 100kΩ to 1.5V, f = 1kHz, VO = 1VPP		 0.010 0.027 V/µs
OUTPUT
VO Voltage output swing RL = 100kΩ Positive rail 4.98 4.99 V
Negative rail 0.01 0.02
RL = 10kΩ Positive rail 4.9 4.98
Negative rail 0.02 0.1
ISC Short-circuit current Sourcing
VO = 0V		 5 7 mA
TJ = –40°C to +85°C 3.5
Sinking
VO = 3V		 5 7
TJ = –40°C to +85°C 3.5
POWER SUPPLY
IQ Quiescent current per amplifier 25 µA
(1) Input bias current specified by design and processing.