SNOSD17G October   2017  – December 2020 LM74700-Q1

PRODMIX  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
  7. 7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input Voltage
      2. 9.3.2 Charge Pump
      3. 9.3.3 Gate Driver
      4. 9.3.4 Enable
    4. 9.4 Device Functional Modes
      1. 9.4.1 Shutdown Mode
      2. 9.4.2 Conduction Mode
        1. 9.4.2.1 Regulated Conduction Mode
        2. 9.4.2.2 Full Conduction Mode
        3. 9.4.2.3 Reverse Current Protection Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Typical Application
        1. 10.1.1.1 Design Requirements
        2. 10.1.1.2 Detailed Design Procedure
          1. 10.1.1.2.1 Design Considerations
          2. 10.1.1.2.2 MOSFET Selection
          3. 10.1.1.2.3 Charge Pump VCAP, input and output capacitance
        3. 10.1.1.3 Selection of TVS Diodes for 12-V Battery Protection Applications
        4. 10.1.1.4 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications
        5. 10.1.1.5 Application Curves
    2. 10.2 OR-ing Application Configuration
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Receiving Notification of Documentation Updates
    2. 13.2 Support Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

9.4.2.2 Full Conduction Mode

For the LM74700-Q1 to operate in full conduction mode the gate driver must be enabled as described in the Gate Driver section and the current from source to drain of the external MOSFET must be large enough to result in an ANODE to CATHODE voltage drop of greater than 50-mV typical. If these conditions are achieved the GATE pin is internally connected to the VCAP pin resulting in the GATE to ANODE voltage being approximately the same as the VCAP to ANODE voltage. By connecting VCAP to GATE the external MOSFET's RDS(ON) is minimized reducing the power loss of the external MOSFET when forward currents are large.