The voltage on the switch node switches from V_IN to –V_OUT in an inverting topology instead of V_IN to GND as in a buck topology. When the high-side MOSFET turns on, the SW node detects the input voltage. When the low-side MOSFET turns on, the SW node detects the device return path, which is the negative output voltage. During start-up, V_IN rises to achieve the desired input voltage, then V_OUT starts ramping down after the EN pin voltage exceeds its threshold level and V_IN exceeds its UVLO threshold. As V_OUT continues to ramp down, the SW node low level follows V_OUT down. Figure 3-2 shows the resulting normal and smooth start-up of the output voltage.

Figure 3-2 SW Node Voltage During Start-Up