SNVAA40 May   2022 LP87523-Q1 , LP87565-Q1

 

  1.   Trademarks
  2. 1Design Parameters
  3. 2Power Solution
  4. 3Sequencing
    1. 3.1 Startup
    2. 3.2 Shutdown
  5. 4Schematic
  6. 5Software Drivers
  7. 6Recommended External Components
  8. 7Measurements
  9. 8Summary
  10. 9References

2 Power Solution

Figure 2-1 shows power tree with LP87565V-Q1, LP875230C-Q1, TLV76733-Q1, TPS6281120-Q1, and TPS74518-Q1 devices powering the X9H rails.

Figure 2-1 Semidrive X9H Power Solution Block Diagram

Main features:

  • 5 V supplied from pre-regulator
  • After the devices are powered, the microcontroller can set the SYS_CTRL0 pin high to initiate the startup sequence.
  • Startup delays are controlled internally in the LP87565V-Q1 and LP875230C-Q1 sequencer and discrete DC-DCs are controlled with PMIC GPIOs.
  • I2C can be used to read status registers and reset interrupts.
  • PMIC devices have dedicated I2C address so they can share the same I2C bus.
  • PG signal from TPS6281120-Q1 act as AP_RESET signal for the SoC. LP875230C and TPS74518-Q1 PG can be combined with this signal to allow SoC reset if any of these rails have failure.