SNVSCK5B April 2024 – October 2025 TPS3842
PRODUCTION DATA
When the voltage on VDD is less than the device VDD(min) voltage, and greater than the power-on reset voltage (VPOR), the RESET signal is asserted and low impedance regardless of the voltage on the SENSE pin. RESET (active high) signal is deasserted regardless of the voltage on the SENSE pin.