SNVSCT0 July   2025 LMR71915

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Control Architecture
      2. 7.3.2  Internal VCC Regulator and Bootstrap Capacitor
      3. 7.3.3  Internal Soft Start
      4. 7.3.4  On-Time Generator
      5. 7.3.5  Current Limit
      6. 7.3.6  N-Channel Buck Switch and Driver
      7. 7.3.7  Synchronous Rectifier
      8. 7.3.8  Enable, Undervoltage Lockout (EN/UVLO)
      9. 7.3.9  Power Good (PGOOD)
      10. 7.3.10 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 Sleep Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Fly-Buck™ Converter Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency (RT)
        2. 8.2.2.2 Transformer Selection
        3. 8.2.2.3 Secondary Output Diode
        4. 8.2.2.4 CBST Selection
        5. 8.2.2.5 Minimum Secondary Output Load
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Compact PCB Layout for EMI Reduction
        2. 8.4.1.2 Feedback Resistors
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

5 Pin Configuration and Functions

LMR71915 8-Pin SO PowerPAD™Integrated Circuit Package(Top View)Figure 5-1 8-Pin SO PowerPAD™Integrated Circuit Package(Top View)
Table 5-1 Pin Functions
PINTYPE(1)DESCRIPTION
NO.NAME
1GNDGGround connection for internal circuits
2VINP/IRegulator supply input pin to the high-side power MOSFET and internal bias regulator. Connect directly to the input supply of the buck converter with short, low impedance paths.
3EN/UVLOIPrecision enable and undervoltage lockout (UVLO) programming pin. If the EN/UVLO rising voltage is below 1.1V, the converter is in shutdown mode with all functions disabled. If the UVLO voltage is greater than 1.1V and below 1.5V, the converter is in standby mode with the internal VCC regulator operational and no switching. If the EN/UVLO voltage is above 1.5V, the start-up sequence begins.
4RTIOn-time programming pin. A resistor between this pin and GND sets the buck switch on time.
5FBIFeedback input of voltage regulation comparator
6PGOODOPower-good indicator. This pin is an open-drain output pin. Connect to a source voltage through an external pullup resistor between 10kΩ to 100kΩ. Connect to GND if the PGOOD feature is not needed.
7BSTP/IBootstrap gate-drive supply. Required to connect a high-quality 2.2nF X7R ceramic capacitor between BST and SW to bias the internal high-side gate driver.
8SWPSwitching node that is internally connected to the source of the high-side NMOS buck switch and the drain of the low-side NMOS synchronous rectifier. Connect to the switching node of the power inductor.
—EP—Exposed pad of the package. Solder the EP to the GND pin and connect to a large copper plane to reduce thermal resistance.
(1) G = Ground, I = Input, O = Output, P = Power