SNVU660 March   2019 TPS65653-Q1

 

  1.   TPS6565342-Q1 Technical Reference Manual
    1. 1 Introduction
    2. 2 OTP Memory Device Settings
    3. 3 Power-up and Power Down Sequence
    4. 4 Register Bits Loaded From OTP Memory
  2.   Mechanical, Packaging, and Orderable Information
    1. 5 Packaging Information
      1. 5.1 Tape and Reel Information

1 Introduction

This technical reference manual can be used as a reference for the TPS6565342-Q1 default register bits after OTP memory download. The TPS6565342-Q1 is designed for Radar applications, and is a part of two chip solution (TPS6565342-Q1 + TPS65313-Q1) to power the AWR1642 and AWR1843 radar chip.This technical reference manual does not provide information about the electrical characteristics, external components, package, or the functionality of the device. For this information and the full register map, refer to the TPS65653-Q1 Dual 3 A Buck Converters data sheet.