SNVU843B April   2023  – June 2025

 

  1.   1
  2.   LM5171 Evaluation Module
  3.   Trademarks
  4. 1Features and Electrical Performance
  5. 2Setup
    1. 2.1 EVM Configurations
    2. 2.2 Bench Setup
    3. 2.3 Test Equipment
    4. 2.4 Jumper Settings for Typical Operation Modes
      1. 2.4.1 Buck Mode with Voltage Regulation
      2. 2.4.2 Boost Mode with Voltage Regulation
      3. 2.4.3 Buck Mode with Current Regulation
      4. 2.4.4 Boost Mode with Current Regulation
      5. 2.4.5 Single Phase Operation
      6. 2.4.6 2-EVM Daisy-Chain for 3 or 4-Phase Operation
  6. 3Test Procedure
    1. 3.1 Buck Mode Power-Up and Power-Down Sequence
    2. 3.2 Boost Mode Power-Up and Power-Down Sequence
    3. 3.3 Bidirectional Operation Power-Up and Power-Down Sequence
    4. 3.4 Operating the EVM With External MCU or Other Digital Circuit
    5. 3.5 How to Adjust the Output Voltage
  7. 4Test Data
    1. 4.1 Efficiency and Thermal Performance
    2. 4.2 Step Load Response
    3. 4.3 Dual-Channel Interleaving Operation
    4. 4.4 Typical Start Up and Shutdown
    5. 4.5 DEM and FPWM
    6. 4.6 Mode Transition Between DEM and FPWM
    7. 4.7 ISET Tracking and Pre-Charge
    8. 4.8 Pre-charge
    9. 4.9 Protections
  8. 5Design Files
    1. 5.1 Schematics
    2. 5.2 Bill of Materials
    3. 5.3 Board Layout
  9. 6Revision History

5.1 Schematics

To download the Schematics for the EVM board, see the design files at www.ti.com/tool.

LM5171-Q1 EVM Schematic Part 1: Overview Figure 5-1 EVM Schematic Part 1: Overview
LM5171-Q1 EVM Schematic Part 2: Bias Supplies Figure 5-2 EVM Schematic Part 2: Bias Supplies
LM5171-Q1 EVM Schematic Part 3: Controller Figure 5-3 EVM Schematic Part 3: Controller
LM5171-Q1 EVM Schematic Part 4: Outer Voltage Loop Figure 5-4 EVM Schematic Part 4: Outer Voltage Loop
LM5171-Q1 EVM Schematic Part 5: Protection Figure 5-5 EVM Schematic Part 5: Protection
LM5171-Q1 EVM Schematic Part 6: Power Stage Figure 5-6 EVM Schematic Part 6: Power Stage
LM5171-Q1 EVM Schematic Part 7: Interface Connectors and Configuration Headers Figure 5-7 EVM Schematic Part 7: Interface Connectors and Configuration Headers