SNVU861 October   2024 LP5812

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Notational Conventions
    3.     Glossary
    4.     Related Documentation
    5.     Support Resources
    6.     Trademarks
  3. 1Introduction/Feature Overview
    1. 1.1 Overview
  4. 2 Register Maps
    1. 2.1  Register Map Table
    2. 2.2  Device_Enable Registers
    3. 2.3  Config Registers
    4. 2.4  Command Registers
    5. 2.5  LED_Enable Registers
    6. 2.6  Fault_Clear Registers
    7. 2.7  Reset Registers
    8. 2.8  Manual_DC Registers
    9. 2.9  Manual_PWM Registers
    10. 2.10 Autonomous_DC Registers
    11. 2.11 LED_0_Autonomous_Animation Registers
    12. 2.12 LED_1_Autonomous_Animation Registers
    13. 2.13 LED_2_Autonomous_Animation Registers
    14. 2.14 LED_3_Autonomous_Animation Registers
    15. 2.15 LED_A0_Autonomous_Animation Registers
    16. 2.16 LED_A1_Autonomous_Animation Registers
    17. 2.17 LED_A2_Autonomous_Animation Registers
    18. 2.18 LED_B0_Autonomous_Animation Registers
    19. 2.19 LED_B1_Autonomous_Animation Registers
    20. 2.20 LED_B2_Autonomous_Animation Registers
    21. 2.21 LED_C0_Autonomous_Animation Registers
    22. 2.22 LED_C1_Autonomous_Animation Registers
    23. 2.23 LED_C2_Autonomous_Animation Registers
    24. 2.24 LED_D0_Autonomous_Animation Registers
    25. 2.25 LED_D1_Autonomous_Animation Registers
    26. 2.26 LED_D2_Autonomous_Animation Registers
    27. 2.27 Flag Registers
  5. 3Revision History

2.6 Fault_Clear Registers

Table 2-27 lists the memory-mapped registers for the Fault_Clear registers. All register offset addresses not listed in Table 2-27 should be considered as reserved locations and the register contents should not be modified.

Table 2-27 FAULT_CLEAR Registers
AddressAcronymRegister NameSection
22hFault_ClearClear the LOD/LSD/TSD flatsGo

2.6.1 Fault_Clear Register (Address = 22h) [Reset = 00h]

Fault_Clear is shown in Figure 2-22 and described in Table 2-28.

Return to the Summary Table.

Figure 2-22 Fault_Clear Register
76543210
RESERVEDtsd_clearlsd_clearlod_clear
R/W-0hW1C-0hW1C-0hW1C-0h
Table 2-28 Fault_Clear Register Field Descriptions
BitFieldTypeResetDescription
7-3RESERVEDR/W0h Reserved
2tsd_clearW1C0h TSD Fault Status Clear
Write 1 to clear and read back 0
1lsd_clearW1C0h LSD Fault Status Clear
Write 1 to clear and read back 0
0lod_clearW1C0h LOD Fault Status Clear
Write 1 to clear and read back 0