SNVU947A October   2025  – April 2026

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
      1. 1.4.1 Application Circuit Diagrams
  8. 2Hardware
    1. 2.1 Test Setup and Procedure
      1. 2.1.1 EVM Connections
      2. 2.1.2 Test Equipment
      3. 2.1.3 Recommended Test Setup
        1. 2.1.3.1 Input Connections
        2. 2.1.3.2 Output Connections
      4. 2.1.4 Test Procedure
        1. 2.1.4.1 Line and Load Regulation, Efficiency
  9. 3Implementation Results
    1. 3.1 Test Data and Performance Curves
      1. 3.1.1 Efficiency
      2. 3.1.2 Operating Waveforms
      3. 3.1.3 Thermal Performance
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 Component Drawings
      2. 4.2.2 Layout Guidelines
        1. 4.2.2.1 Power Stage Layout
        2. 4.2.2.2 Small-signal Component Layout
        3. 4.2.2.3 Thermal Design and Layout
        4. 4.2.2.4 Ground Plane Design
    3. 4.3 Bill of Materials
  11. 5Compliance Information
    1. 5.1 Compliance and Certifications
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
    2. 7.2 Documentation Support
      1. 7.2.1 Related Documentation
        1. 7.2.1.1 Low-EMI Design Resources
        2. 7.2.1.2 Thermal Design Resources
        3. 7.2.1.3 PCB Layout Resources
  14. 8Revision History

1.3 Specifications

The following table lists the EVM specifications. VIN = 48V, VOUT = 12V, FSW = 400kHz, unless otherwise indicated.

Table 1-1 Electrical Performance Characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT CHARACTERISTICS
Input voltage, VIN DC operating 24 48 65 V
Transient 80 V
Input UVLO turn-on threshold, VIN-ON RUV1 = 200kΩ, RUV2 = 10kΩ 21 V
Input UVLO turn-off threshold, VIN-OFF 19
Input supply current, no load, FPWM,
IIN-NL(FPWM)		 IOUT = 0A, FPWM/SYNC tied to VCC VIN = 24V 22 mA
VIN = 36V 25
VIN = 48V 26
VIN = 60V 25
OUTPUT CHARACTERISTICS
Output voltage, VOUT Fixed output setting (or adjustable output setting with 100kΩ and 9.09kΩ feedback divider)(1) 11.9 12 12.1 V
Output voltage adjustment range, VOUT-ADJ With suitable BOM changes(2) 3.3 15 V
Output current, IOUT Electrical design current (EDC) 20 A
Thermal design current (TDC)(3), airflow = 100LFM(4) 15 A
Output voltage regulation in FPWM, ΔVOUT Load regulation IOUT = 0A to 20A 4 mV
Line regulation VIN = 24V to 65V 4
Output voltage ripple, VOUT-AC IOUT = 10A 10 mVRMS
Output overcurrent protection, IOUT-OCP RS = 1mΩ, IMON tied to GND 26 A
Output average current limit, IOUT-CC RIMON = 8.66kΩ 22 A
Soft-start time, tSS VSET pin open circuit 2.7 ms
Hiccup time, tRES 16384 clock cycles 41 ms
SYSTEM CHARACTERISTICS
Switching frequency, FSW RRT = 54.9kΩ 400 kHz
Synchronization frequency range, FSYNC 320 480 kHz
Half-load efficiency, ηFULL(1) IOUT = 10A VIN = 24V 98.3%
VIN = 36V 97.7%
VIN = 48V 97.9%
VIN = 60V 97.2%
Full-load efficiency, ηFULL(1) IOUT = 20A VIN = 24V 97.5%
VIN = 36V 97.2%
VIN = 48V 97.0%
VIN = 60V 96.7%
LMG708B0 case temperature, TC –40 135 °C
(1) The default output voltage of this EVM is 12V. Efficiency and other performance metrics can change based on the operating input voltage, load current, ambient temperature, externally-connected output capacitors and other parameters.
(2) See Table 4-2 and Table 4-3 for BOM changes related to 5V and 3.3V output designs, respectively.
(3) EDC and TDC can differ, for example when the application requires short-duration transients to a high-current amplitude that does not substantially increase the operating temperatures of the power-stage components.
(4) The recommended airflow is 100LFM when operating at loads above 15A at 25°C ambient temperature. Higher ambient temperatures require increased airflow or heatsinking to keep the GaN IC case temperature below 135°C. See Section 3.1.3.