SNWS014D March   2004  – June 2025 LMV242 , LMV2421

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Electrical Characteristics for 2.6V
    4. 5.4 Electrical Characteristics for 5V
    5. 5.5 Timing Diagram
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Functional Block Diagram
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Power-Control Principles
      2. 7.1.2 Power Amplifier Controlled Loop
        1. 7.1.2.1 General Overview
        2. 7.1.2.2 Typical PA Closed Loop Control Setup
          1. 7.1.2.2.1 Power Control Over Wide Dynamic Range
      3. 7.1.3 Attenuation Between the Coupler and LMV242x Detector
      4. 7.1.4 Control of the LMV242x
        1. 7.1.4.1 VRAMP Signal
        2. 7.1.4.2 Transmit Enable
        3. 7.1.4.3 Band Select (LMV242 Only)
        4. 7.1.4.4 Analog Output
      5. 7.1.5 Frequency Compensation
    2. 7.2 Typical Application
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.4 Electrical Characteristics for 5V

all limits specified to TJ = 25°C and VDD = 5V (unless otherwise noted); boldface limits apply at temperature extremes (1).
SYMBOL PARAMETER CONDITION MIN TYP MAX UNITS
IDD Supply current VOUT = (VDD – GND) / 2 7.8 12
15		 mA
In Shutdown (TX_EN = 0V)
VOUT = (VDD – GND) / 2		 0.4 30 µA
VHIGH Logic level to enable power See (2) 1.8 V
VLOW Logic level to disable power See (2) 0.8 V
TON Turn-on-time from shutdown 1.5 6 μs
IEN, IBS Current into TX_EN and BS pin 0.03 5 µA
RAMP AMPLIFIER
VRD VRAMP deadband 155 206 265 mV
1/RRAMP Transconductance See (3) 70 96 120 µA/V
IOUT RAMP Ramp amplifier output current VRAMP = 2V 100 168 µA
RF INPUT
PIN RF input power range (4) 20kΩ || 68pF between COMP1 and COMP2 −50
0		 dBm
−63
−13		 dBV
Logarithmic slope (5) At 900MHz, 20kΩ || 68pF between COMP1 and COMP2 −1.79 µA/dB
At 1800MHz, 20kΩ || 68pF between COMP1 and COMP2 –1.69
At 1900MHz, 20kΩ || 68pF between COMP1 and COMP2 −1.67
At 2000MHz, 20kΩ || 68pF between COMP1 and COMP2 –1.65
Logarithmic intercept (5) At 900MHz, 20kΩ || 68pF between COMP1 and COMP2 –50.2 dBm
At 1800MHz, 20kΩ || 68pF between COMP1 and COMP2 –52.5
At 1900MHz, 20kΩ || 68pF between COMP1 and COMP2 –52.5
At 2000MHz, 20kΩ || 68pF between COMP1 and COMP2 –52.9
RIN DC resistance See (3) 55.7 Ω
ERROR AMPLIFIER
GBW Gain-bandwidth product See (3) 5.7 MHz
VO Output swing from rail From positive rail, sourcing,
IO = 7mA		 31 80
105		 mV
From negative rail sinking,
IO = −7mA		 35 80
105
IO Output short circuit current (6) Sourcing, VO = 4.8V 15 31.5 mA
Sinking, VO = 0.2V 15 31.5
en Output referred noise fMEASURE = 10kHz,
RF input = 1800MHz, –10dBm, 20kΩ || 68pF between COMP1 and COMP2, VOUT = 1.4V, set by VRAMP (3)		 770 nV/√Hz
SR Slew rate 2.5 4.9 V/μs
(1) Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA.
(2) All limits are specified by design or statistical analysis.
(3) Typical values represent the most likely parametric norm.
(4) Power in dBV = dBm + 13 when the impedance is 50Ω.
(5) Slope and intercept calculated from graphs VOUT vs RF input power where the current is obtained by division of the voltage by 20kΩ.
(6) The output is not short-circuit protected internally. External protection is necessary to prevent overheating and destruction or adverse reliability.